公开(公告)号：US20240430500A1

公开(公告)日：2024-12-26

申请号：US18212251

申请日：2023-06-21

Applicant: Crestron Electronics, Inc.

Inventor： Adolfo Velasco ,  Agesino Primatic

IPC: H04N21/238 ,  H04N21/2343

Abstract: Switching from delivering a first video signal to a sink to delivering a second video signal to the sink is carried out. A repeater, connected to a previously authenticated sink, receives the first video signal outputted by a previously authenticated first source, and delivers the first video signal to the sink. The repeater receives a command to switch from the first video signal to the second video signal outputted by a second source. The repeater terminates receiving the first video signal, and delivers a temporary video signal to the sink so that the sink remains authenticated while the second source is being authenticated. The repeater sets the frame rate of the temporary video signal to a minimum variable refresh rate (VRR) supported by the sink. Upon completion of authentication of the second source, the repeater receives the second video signal and delivers the signal to the sink.

公开(公告)号：US12294749B2

公开(公告)日：2025-05-06

申请号：US18212251

申请日：2023-06-21

Applicant: Crestron Electronics, Inc.

Inventor： Adolfo Velasco ,  Agesino Primatic

IPC: H04N21/438 ,  H04N21/2343 ,  H04N21/238 ,  H04N21/258

Abstract: Switching from delivering a first video signal to a sink to delivering a second video signal to the sink is carried out. A repeater, connected to a previously authenticated sink, receives the first video signal outputted by a previously authenticated first source, and delivers the first video signal to the sink. The repeater receives a command to switch from the first video signal to the second video signal outputted by a second source. The repeater terminates receiving the first video signal, and delivers a temporary video signal to the sink so that the sink remains authenticated while the second source is being authenticated. The repeater sets the frame rate of the temporary video signal to a minimum variable refresh rate (VRR) supported by the sink. Upon completion of authentication of the second source, the repeater receives the second video signal and delivers the signal to the sink.

公开(公告)号：US10419766B2

公开(公告)日：2019-09-17

申请号：US15940151

申请日：2018-03-29

Applicant: Crestron Electronics, Inc.

Inventor： Mark LaBosco ,  Agesino Primatic ,  Michael Bottiglieri

IPC: H04N19/172 ,  H04N19/86 ,  H03L7/06 ,  H04N19/146 ,  H04N21/24 ,  H04L29/06 ,  H04N21/242 ,  H04N21/43

Abstract: Presented are a system and method for distributing video over a network. The system includes a source that outputs video with a first frame rate, a transmitter, a receiver, and a sink. The transmitter receives video from the source and processes the video by encoding the video with frame boundary information, packetizing, and transmitting the video. The receiver includes a frame buffer, a timing generator, and a PLL. The receiver receives and processes the video by retrieving the frame boundary information, decoding the video into sub-frames, and writing the sub-frames to the buffer. All the processing occurs on sub-frame portions of the video in sub-frame time intervals. The receiver transmits video with a second frame rate to the sink. The timing generator generates output timing and uses the PLL to synchronize the output timing with the frame boundary information and synchronizes the first and second frame rates.

公开(公告)号：US20180288424A1

公开(公告)日：2018-10-04

申请号：US15940151

申请日：2018-03-29

Applicant: Crestron Electronics, Inc.

Inventor： Mark LaBosco ,  Agesino Primatic ,  Michael Bottiglieri

IPC: H04N19/172 ,  H04N19/146 ,  H03L7/06 ,  H04N19/86

CPC classification number: H04N19/172 ,  H03L7/06 ,  H04L65/4076 ,  H04L65/4084 ,  H04L65/607 ,  H04L65/608 ,  H04L65/80 ,  H04N19/146 ,  H04N19/86 ,  H04N21/242 ,  H04N21/4305

Abstract: Presented are a system and method for distributing video over a network. The system includes a source that outputs video with a first frame rate, a transmitter, a receiver, and a sink. The transmitter receives video from the source and processes the video by encoding the video with frame boundary information, packetizing, and transmitting the video. The receiver includes a frame buffer, a timing generator, and a PLL. The receiver receives and processes the video by retrieving the frame boundary information, decoding the video into sub-frames, and writing the sub-frames to the buffer. All the processing occurs on sub-frame portions of the video in sub-frame time intervals. The receiver transmits video with a second frame rate to the sink. The timing generator generates output timing and uses the PLL to synchronize the output timing with the frame boundary information and synchronizes the first and second frame rates.