公开(公告)号：US20230232607A1

公开(公告)日：2023-07-20

申请号：US17420124

申请日：2020-12-03

Applicant: ChangXin Memory Technologies, Inc.

Inventor： Jinil LEE

IPC: H10B12/00

CPC classification number: H10B12/0387 ,  H10B12/373 ,  H01L28/91

Abstract: The present disclosure is in the field of semiconductor devices, in particular, to a semiconductor structure and a method of forming the same. The semiconductor structure includes: a substrate with a trench extending in a direction of the substrate; a capacitor fabricated in the trench, the capacitor includes a lower electrode disposed on an inner wall of the trench, a dielectric combination layer disposed on the lower electrode, and an upper electrode disposed on the dielectric combination layer; the dielectric combination layer includes a stacked structure composed of a nitride layer and an oxide layer. The device can increase the capacitance of the capacitor significantly and reduce the occurrence of charge leakage, thereby improving the electrical performance of the semiconductor memory device.