DIGITAL CLASS-D AMPLIFIER WITH ANALOG FEEDBACK
    1.
    发明申请
    DIGITAL CLASS-D AMPLIFIER WITH ANALOG FEEDBACK 有权
    具有模拟反馈功能的DIGITAL CLASS-D放大器

    公开(公告)号:US20150180430A1

    公开(公告)日:2015-06-25

    申请号:US14144262

    申请日:2013-12-30

    CPC classification number: H03F3/2175 H03F3/217 H03F2200/351

    Abstract: Methods, systems, and apparatuses for detecting and suppressing analog error in an output stage of a digital class-D amplifier are described. In embodiments, the digital class-D amplifier includes a PWM stage, an output stage, and a feedback circuit. The PWM stage receives the signal difference between an input digital signal and a feedback digital signal, generates a digital pulse-width modulated (PWM) signal based thereon, and provides the digital PWM signal as a first component of the digital feedback signal. The output stage receives the digital PWM signal and generates an analog output signal for driving a load responsive to the digital PWM signal. The feedback circuit combines an analog representation of the PWM signal and the analog output signal to generate a second component of the digital feedback signal.

    Abstract translation: 描述了用于检测和抑制数字D类放大器的输出级中的模拟错误的方法,系统和装置。 在实施例中,数字D类放大器包括PWM级,输出级和反馈电路。 PWM级接收输入数字信号和反馈数字信号之间的信号差,基于此产生数字脉宽调制(PWM)信号,并提供数字PWM信号作为数字反馈信号的第一分量。 输出级接收数字PWM信号,并产生用于响应于数字PWM信号驱动负载的模拟输出信号。 反馈电路组合了PWM信号和模拟输出信号的模拟表示,以产生数字反馈信号的第二分量。

    System, apparatus, and method for a ping-pong charge pump
    2.
    发明授权
    System, apparatus, and method for a ping-pong charge pump 有权
    乒乓电荷泵的系统,装置和方法

    公开(公告)号:US09564794B2

    公开(公告)日:2017-02-07

    申请号:US14139257

    申请日:2013-12-23

    CPC classification number: H02M1/14 H02M3/07 H02M2003/077

    Abstract: Systems, apparatuses, and methods provided for ping-pong charge pumps. Flying capacitors present in ping-pong charge pumps are operated out of phase to increase equalization periods. Out-of-phase operation also decreases voltage differences between flying capacitors during equalization periods thus decreasing ping-pong charge pump output voltage ripple and snapback. The voltages of the flying capacitors may be equalized without the use of an equalization switch. Differential control currents that are based on the voltage difference between the flying capacitors are used to enable or disable the flying capacitors from driving an output load of the ping-pong charge pump during certain phases of operation. A capacitor with a lower voltage may be disabled, thus providing for voltage equalization as the enabled capacitor sources current to the output load. The flying capacitors are also equalized during overlapping time periods in which the flying capacitors are charging.

    Abstract translation: 为乒乓电荷泵提供的系统,设备和方法。 乒乓电荷泵中存在的飞电容器异相运行,以增加均衡周期。 异相操作也会在均衡期间降低飞溅电容器之间的电压差,从而减少乒乓电荷泵输出电压纹波和回跳。 可以在不使用均衡开关的情况下使飞行电容器的电压相等。 基于飞跨电容器之间的电压差的差分控制电流用于在某些操作阶段启用或禁用飞镖电容器驱动乒乓电荷泵的输出负载。 可以禁用具有较低电压的电容器,从而在使能电容器电流流向输出负载时提供电压均衡。 飞行电容器在飞行电容器充电的重叠时间段期间也相等。

    Digital class-D amplifier with analog feedback
    3.
    发明授权
    Digital class-D amplifier with analog feedback 有权
    具有模拟反馈功能的数字D类放大器

    公开(公告)号:US09344046B2

    公开(公告)日:2016-05-17

    申请号:US14144262

    申请日:2013-12-30

    CPC classification number: H03F3/2175 H03F3/217 H03F2200/351

    Abstract: Methods, systems, and apparatuses for detecting and suppressing analog error in an output stage of a digital class-D amplifier are described. In embodiments, the digital class-D amplifier includes a PWM stage, an output stage, and a feedback circuit. The PWM stage receives the signal difference between an input digital signal and a feedback digital signal, generates a digital pulse-width modulated (PWM) signal based thereon, and provides the digital PWM signal as a first component of the digital feedback signal. The output stage receives the digital PWM signal and generates an analog output signal for driving a load responsive to the digital PWM signal. The feedback circuit combines an analog representation of the PWM signal and the analog output signal to generate a second component of the digital feedback signal.

    Abstract translation: 描述了用于检测和抑制数字D类放大器的输出级中的模拟错误的方法,系统和装置。 在实施例中,数字D类放大器包括PWM级,输出级和反馈电路。 PWM级接收输入数字信号和反馈数字信号之间的信号差,基于此产生数字脉宽调制(PWM)信号,并提供数字PWM信号作为数字反馈信号的第一分量。 输出级接收数字PWM信号,并产生用于响应于数字PWM信号驱动负载的模拟输出信号。 反馈电路组合了PWM信号和模拟输出信号的模拟表示,以产生数字反馈信号的第二分量。

    SYSTEM, APPARATUS, AND METHOD FOR A PING-PONG CHARGE PUMP
    4.
    发明申请
    SYSTEM, APPARATUS, AND METHOD FOR A PING-PONG CHARGE PUMP 有权
    一种PING-PONG充电泵的系统,装置和方法

    公开(公告)号:US20150155771A1

    公开(公告)日:2015-06-04

    申请号:US14139257

    申请日:2013-12-23

    CPC classification number: H02M1/14 H02M3/07 H02M2003/077

    Abstract: Systems, apparatuses, and methods provided for ping-pong charge pumps. Flying capacitors present in ping-pong charge pumps are operated out of phase to increase equalization periods. Out-of-phase operation also decreases voltage differences between flying capacitors during equalization periods thus decreasing ping-pong charge pump output voltage ripple and snapback. The voltages of the flying capacitors may be equalized without the use of an equalization switch. Differential control currents that are based on the voltage difference between the flying capacitors are used to enable or disable the flying capacitors from driving an output load of the ping-pong charge pump during certain phases of operation. A capacitor with a lower voltage may be disabled, thus providing for voltage equalization as the enabled capacitor sources current to the output load. The flying capacitors are also equalized during overlapping time periods in which the flying capacitors are charging.

    Abstract translation: 为乒乓电荷泵提供的系统,设备和方法。 乒乓电荷泵中存在的飞电容器异相运行,以增加均衡周期。 异相操作也会在均衡期间降低飞溅电容器之间的电压差,从而减少乒乓电荷泵输出电压纹波和回跳。 可以在不使用均衡开关的情况下使飞行电容器的电压相等。 基于飞跨电容器之间的电压差的差分控制电流用于在某些操作阶段启用或禁用飞镖电容器驱动乒乓电荷泵的输出负载。 可以禁用具有较低电压的电容器,从而在使能电容器电流流向输出负载时提供电压均衡。 飞行电容器在飞行电容器充电的重叠时间段期间也相等。

    Integrated CMOS multi-mode drivers
    5.
    发明授权
    Integrated CMOS multi-mode drivers 有权
    集成CMOS多模驱动程序

    公开(公告)号:US08923492B2

    公开(公告)日:2014-12-30

    申请号:US13850355

    申请日:2013-03-26

    CPC classification number: H04M11/00 H04M11/062

    Abstract: A multi-mode line driver circuit designed to be fabricated in a CMOS process and capable of supporting a plurality of operating modes corresponding, for example, to different profiles of communication standards such as xDSL standards. The line driver circuit incorporates integrated mode switches with a two-stage amplifier architecture to relax amplifier requirements by distributing the signal gain into two amplifier stages. Reconfigurable feedback loops are provided to permit design optimization for particular modes of operation (e.g., ADSL and VDSL compliant modes). In one embodiment implemented as a Class-H amplifier, lift amplifier(s) are provided between a first amplifier stage and a second amplifier stage for controlling voltage supply levels of the second amplifier stage. The lift amplifiers may be enabled by voltage threshold detection circuitry that monitors either the input or the output signals of the first amplifier stage depending on the operable transmission mode.

    Abstract translation: 设计为以CMOS工艺制造并能够支持多个操作模式的多模式线路驱动器电路,其例如对应于诸如xDSL标准的通信标准的不同简档。 线路驱动器电路集成了具有两级放大器架构的集成模式开关,通过将信号增益分配到两个放大器级来放大放大器要求。 提供可重构的反馈回路以允许针对特定操作模式(例如,ADSL和VDSL兼容模式)的设计优化。 在实现为H类放大器的一个实施例中,提升放大器设置在第一放大器级和第二放大级之间,用于控制第二放大级的电压电平。 升压放大器可以由电压阈值检测电路使能,电压阈值检测电路根据可操作的传输模式来监视第一放大器级的输入或输出信号。

    Integrated CMOS Multi-mode Drivers
    6.
    发明申请
    Integrated CMOS Multi-mode Drivers 有权
    集成CMOS多模驱动器

    公开(公告)号:US20140254779A1

    公开(公告)日:2014-09-11

    申请号:US13850355

    申请日:2013-03-26

    CPC classification number: H04M11/00 H04M11/062

    Abstract: A multi-mode line driver circuit designed to be fabricated in a CMOS process and capable of supporting a plurality of operating modes corresponding, for example, to different profiles of communication standards such as xDSL standards. The line driver circuit incorporates integrated mode switches with a two-stage amplifier architecture to relax amplifier requirements by distributing the signal gain into two amplifier stages. Reconfigurable feedback loops are provided to permit design optimization for particular modes of operation (e.g., ADSL and VDSL compliant modes). In one embodiment implemented as a Class-H amplifier, lift amplifier(s) are provided between a first amplifier stage and a second amplifier stage for controlling voltage supply levels of the second amplifier stage. The lift amplifiers may be enabled by voltage threshold detection circuitry that monitors either the input or the output signals of the first amplifier stage depending on the operable transmission mode.

    Abstract translation: 设计为以CMOS工艺制造并能够支持多个操作模式的多模式线路驱动器电路,其例如对应于诸如xDSL标准的通信标准的不同简档。 线路驱动器电路集成了具有两级放大器架构的集成模式开关,通过将信号增益分配到两个放大器级来放大放大器要求。 提供可重构的反馈回路以允许针对特定操作模式(例如,ADSL和VDSL兼容模式)的设计优化。 在实现为H类放大器的一个实施例中,提升放大器设置在第一放大器级和第二放大级之间,用于控制第二放大级的电压电平。 升压放大器可以由电压阈值检测电路使能,电压阈值检测电路根据可操作的传输模式来监视第一放大器级的输入或输出信号。

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