Digital timing discriminator
    1.
    发明授权
    Digital timing discriminator 失效
    数字定时鉴别器

    公开(公告)号:US5180935A

    公开(公告)日:1993-01-19

    申请号:US821290

    申请日:1992-01-10

    CPC classification number: G01R23/15

    Abstract: A frequency discriminator circuit is provided having increased resolution for detecting the frequency of a data input signal above and below a predetermined frequency threshold by monitoring a count value. The output signal of the frequency discriminator circuit remains at a first logic state provided the count value is reset by the data input signal before reaching a predetermined count value signifying that the frequency of data input signal is above the predetermined frequency threshold. The output signal of the frequency discriminator circuit switches to a second logic state if the count value reaches the predetermined count value before receiving a reset signal thereby indicating that the frequency of data input signal is below the predetermined frequency threshold.

    Abstract translation: 提供了一种频率鉴别器电路,其具有增加的分辨率,用于通过监视计数值来检测高于和低于预定频率阈值的数据输入信号的频率。 鉴于数字输入信号的频率高于预定的频率阈值,在达到预定计数值之前,如果计数值由数据输入信号复位,则鉴频器电路的输出信号保持在第一逻辑状态。 如果在接收到复位信号之前计数值达到预定计数值,则指示数据输入信号的频率低于预定频率阈值,则鉴频器电路的输出信号切换到第二逻辑状态。

    Differential high speed track and hold amplifier
    2.
    发明授权
    Differential high speed track and hold amplifier 失效
    差分高速跟踪放大器

    公开(公告)号:US5517141A

    公开(公告)日:1996-05-14

    申请号:US400686

    申请日:1995-03-08

    CPC classification number: G11C27/026

    Abstract: A differential track and hold amplifier circuit (200) is provided. The track and hold amplifier includes an input transconductance amplifier (212), an output amplifier (111), and a second transconductance amplifier (214). The track and hold circuit further includes a switching circuit (108) for coupling the output of the input transconductance amplifier to a capacitor (110) in the output stage of the track and hold circuit during track mode, and for decoupling the capacitor from the input amplifier during hold mode. The track and hold circuit further includes a subtractor circuit (103) for reducing a common mode voltage of the output of the input transconductance amplifier, thereby maintaining a stable voltage across the capacitor during hold mode. Further, during hold mode, the second transconductance amplifier acts in a negative feedback configuration to reduce the gain of the input amplifier to attenuate its output signal.

    Abstract translation: 提供差分跟踪和保持放大器电路(200)。 轨道和保持放大器包括输入跨导放大器(212),输出放大器(111)和第二跨导放大器(214)。 轨道和保持电路还包括用于在轨道模式期间将输入跨导放大器的输出耦合到轨道和保持电路的输出级中的电容器(110)的开关电路(108),以及用于将电容器与输入端 放大器在保持模式下。 轨道和保持电路还包括用于减小输入跨导放大器的输出的共模电压的减法器电路(103),从而在保持模式期间保持电容器两端的稳定电压。 此外,在保持模式期间,第二跨导放大器作用在负反馈配置中以减小输入放大器的增益以衰减其输出信号。

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