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公开(公告)号:US20240090285A1
公开(公告)日:2024-03-14
申请号:US18274200
申请日:2021-12-23
Inventor: Junbo WEI , Shengji YANG , Pengcheng LU , Kuanta HUANG , Yuanlan TIAN
IPC: H10K59/131 , H10K59/88
CPC classification number: H10K59/131 , H10K59/88
Abstract: Disclosed is a display apparatus comprising a display area and a dummy area; the display area comprises multiple pixel driving circuits and multiple display light-emitting devices, and the display light-emitting devices at least comprise a display anode and a display cathode; the dummy region comprises a cathode voltage line, at least one dummy anode connection line and multiple dummy light-emitting devices, the dummy light-emitting devices at least comprise a dummy anode and a dummy cathode; the display cathode and the dummy cathode are both connected to the cathode voltage line, the display anode being connected to a pixel driving circuit, and the dummy anode is connected to a dummy anode connection line, the dummy anode connection line being configured to cause the voltage differential between the dummy anode and the dummy cathode to be less than the turn-on voltage of the dummy light-emitting device.
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公开(公告)号:US20230017885A1
公开(公告)日:2023-01-19
申请号:US17954377
申请日:2022-09-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Zhijian ZHU , Pengcheng LU , Yu AO , Yunlong LI , Yuanlan TIAN
Abstract: A display panel includes: a silicon-based substrate, a driving layer, a first electrode layer, an organic light emitting layer, a second electrode layer and a plurality of pads. Where, the display signal access pad is configured to access the display signal during a display phase, the test signal access pad at least includes a first group of test phase access pads, and the first group of test phase access pads includes a first pad and a second pad, the first pad is electrically connected with the electrode ring, and the second pad is electrically connected with the silicon-based substrate.
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公开(公告)号:US20220140050A1
公开(公告)日:2022-05-05
申请号:US17259465
申请日:2020-03-24
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Li LIU , Pengcheng LU , Rongrong SHI , Yuanlan TIAN , Xiao BAI , Dacheng ZHANG
Abstract: Provided is display substrate, including driving circuit board, and first electrode layer, insulating layer, second electrode layer, isolation layer, transparent conductive layer sequentially stacked thereon. Driving circuit board includes pixel and bonding regions. First electrode layer includes first sub-portion in bonding region and second sub-portion in pixel region. Insulating and isolation layers are partially cover bonding and pixel regions. Insulating layer has first via hole in area corresponding to first sub-portion. Isolation layer has second via hole in the area. Axes of first and second via holes coincide, first sub-portion is exposed at first and second via holes. Second electrode layer is in pixel region, coupled to second sub-portion through third via hole in area corresponding to second sub-portion. Isolation layer has fourth via hole in area corresponding to second electrode layer. Transparent conductive layer is in pixel region, coupled to second electrode layer through fourth via hole.
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公开(公告)号:US20220115484A1
公开(公告)日:2022-04-14
申请号:US17266625
申请日:2020-03-27
Applicant: BOE Technology Group Co., Ltd.
Inventor: Pengcheng LU , Shengji YANG , Kuanta HUANG , Xiaochuan CHEN , Yage SONG , Yanming WANG , Hui WANG , Dongdong DUAN , Jiantong LI , Xiao BAI , Yunlong LI , Shuai TIAN , Zhijian ZHU , Yu AO , Junbo WEI , Chao PU , Yuanlan TIAN
IPC: H01L27/32
Abstract: Provided are a display substrate and a preparation method thereof, and a display apparatus. The display substrate includes a silicon-based substrate and an array structure layer arranged on the silicon-based substrate; a driving transistor and a first power line being arranged in the silicon-based substrate in the display area, a light emitting element being disposed on the array structure layer in the display area, a first electrode of the driving transistor being connected with the first power line, and a second electrode of the driving transistor being connected with an anode of the light emitting element; a power supply electrode and a second power line being arranged in the silicon-based substrate in the peripheral area, the power supply electrode being connected with the second power line.
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公开(公告)号:US20230345787A1
公开(公告)日:2023-10-26
申请号:US17636030
申请日:2021-04-27
Applicant: BOE Technology Group Co., Ltd.
Inventor: Zhijian ZHU , Pengcheng LU , Chenyu CHEN , Shengji YANG , Xiaochuan CHEN , Yan SUN , Tiankuo SHI , Xiaomang ZHANG , Yuanlan TIAN , Dacheng ZHANG
IPC: H10K59/35 , H10K59/131
CPC classification number: H10K59/353 , H10K59/351 , H10K59/131
Abstract: A pixel structure, a driving method thereof, a display panel, and a display apparatus are provided. The pixel structure includes: a plurality of pixel rows and a plurality of pixel columns. Each pixel row includes: sub-pixels of four different colors. The plurality of pixel columns include: a plurality of first pixel columns and a plurality of second pixel columns arranged alternately. Each of the first pixel columns includes: sub-pixels of three of the four different colors. Each of the second pixel columns includes: sub-pixels of another color other than the three of the four different colors.
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公开(公告)号:US20230269974A1
公开(公告)日:2023-08-24
申请号:US17261034
申请日:2020-03-27
Applicant: BOE Technology Group Co., Ltd.
Inventor: Yunlong LI , Pengcheng LU , Shuai TIAN , Yu AO , Zhijian ZHU , Yuanlan TIAN
IPC: H10K59/131 , H10K59/124 , H10K59/12 , H10K71/16
CPC classification number: H10K59/131 , H10K59/1201 , H10K59/124 , H10K71/162
Abstract: Provided is a display substrate, including: a silicon-based substrate having a display area, a binding area located on one side of the display area, and a trace area located between the display area and the binding area; a trace protection structure is arranged on the silicon-based substrate in the trace area, and a pad assembly is integrated in the silicon-based substrate in the binding area; and a minimum distance between an edge of an orthographic projection of the trace protection structure on the silicon-based substrate and an edge of an orthographic projection of an opening of the pad assembly on the silicon-based substrate is smaller than a maximum size of one subpixel.
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公开(公告)号:US20220140018A1
公开(公告)日:2022-05-05
申请号:US17259729
申请日:2020-03-18
Applicant: BOE Technology Group Co., Ltd.
Inventor: Li LIU , Pengcheng LU , Rongrong SHI , Yuanlan TIAN , Junbo WEI , Dacheng ZHANG
Abstract: The present disclosure provides an array substrate including a driving circuit board, and a first electrode layer, an insulating layer, and an anode structure sequentially stacked thereon. The anode structure includes a reflective layer, an intermediate dielectric layer, and a transparent conductive layer sequentially provided in a direction away from the driving circuit board. The array substrate has first, second, and third pixel regions. The anode structure includes first, second, and third anode structures. The first electrode layer includes first, second and third sub-portions. The first, second and third anode structures are coupled with the first, second and third sub-portions through first, second and third via holes in the insulating layer, respectively. A surface of the insulating layer in contact with the first, second and third anode structures is flush; and a thickness of the intermediate dielectric layer in the second, first and third anode structures increases sequentially.
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公开(公告)号:US20220093696A1
公开(公告)日:2022-03-24
申请号:US17213532
申请日:2021-03-26
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Junbo WEI , Shengji YANG , Kuanta HUANG , Pengcheng LU , Yuanlan TIAN
IPC: H01L27/32 , H01L51/00 , H01L51/52 , H01L51/56 , G09G3/3225
Abstract: A silicon-based OLED display substrate, a manufacturing method thereof and a display device are provided. The display substrate includes: a silicon-based base and a device layer arranged on the silicon-based base. The silicon-based base includes a drive circuit layer. The drive circuit layer includes a drive circuit, an electrical connection bonding area, and a storage unit storing compensation voltage of each MOSFET of the drive circuit. An orthographic projection of the drive circuit on the silicon-based base, an orthographic projection of the storage unit on the silicon-based base, and an orthographic projection of the electrical connection binding area on the silicon-based base do not overlap with each other.
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公开(公告)号:US20210408205A1
公开(公告)日:2021-12-30
申请号:US16959214
申请日:2019-08-27
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Pengcheng LU , Yunlong LI , Yuanlan TIAN , Yu AO
Abstract: A display substrate and a manufacturing method and a display device are provided. The display substrate includes: a first electrode pattern, a connecting electrode pattern, a second electrode, and a light-emitting functional layer. The first electrode pattern is located in a display region and includes a plurality of first electrodes spaced apart from each other. The connecting electrode pattern is located in a peripheral and includes a plurality of connecting electrodes. The second electrode is connected with the connecting electrode pattern, the second electrode and the first electrode pattern being spaced apart from each other. The light-emitting functional layer is located between the first electrode pattern and the second electrode, the connecting electrode pattern surrounds the first electrode pattern, and at least two of the plurality of connecting electrodes are each of a block shape and are spaced apart from each other.
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公开(公告)号:US20240090295A1
公开(公告)日:2024-03-14
申请号:US18271455
申请日:2021-10-22
Inventor: Junbo WEI , Zhijian ZHU , Shengji YANG , Pengcheng LU , Kuanta HUANG , Yuanlan TIAN
IPC: H10K59/35 , H10K59/12 , H10K59/131
CPC classification number: H10K59/353 , H10K59/1201 , H10K59/131
Abstract: A display backboard includes a base substrate and a plurality of real pixel units periodically arranged on one side of the base substrate. Each real pixel unit has a plurality of real light-emitting layers with different colors, at least two real metal wiring layers are provided on one side of each real light-emitting layer proximal to the base substrate, and two real metal wiring layers on the side of each real light-emitting layer are electrically connected through via holes. Orthographic projections of the two real metal wiring layers on the side of each real light-emitting layer on the base substrate cover an orthographic projection of at least one of the via holes on the base substrate, and the via holes are configured to connect two virtual metal wiring layers in a virtual pixel unit different from the real pixel unit.
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