公开(公告)号：US10991289B2

公开(公告)日：2021-04-27

申请号：US16346962

申请日：2018-09-27

Applicant: BOE Technology Group Co., Ltd.

Inventor： Guangliang Shang ,  Chengyou Han ,  Mingfu Han ,  Lijun Yuan ,  Xing Yao ,  Haoliang Zheng

IPC: G09G3/20

Abstract: The present disclosure is related to a memory-in-pixel circuit. The memory-in-pixel circuit comprises a switch sub-circuit, and a data input sub-circuit. The data input sub-circuit comprises a first floating gate transistor and a second floating gate transistor. The data input sub-circuit is configured to transmit a data signal from one of a plurality of data lines to a pixel electrode under control of the switch sub-circuit.

公开(公告)号：US20200265763A1

公开(公告)日：2020-08-20

申请号：US16346962

申请日：2018-09-27

Applicant: BOE Technology Group Co., Ltd.

Inventor： Guangliang Shang ,  Chengyou Han ,  Mingfu Han ,  Lijun Yuan ,  Xing Yao ,  Haoliang Zheng

IPC: G09G3/20

Abstract: The present disclosure is related to a memory-in-pixel circuit. The memory-in-pixel circuit comprises a switch sub-circuit, and a data input sub-circuit. The data input sub-circuit comprises a first floating gate transistor and a second floating gate transistor. The data input sub-circuit is configured to transmit a data signal from one of a plurality of data lines to a pixel electrode under control of the switch sub-circuit.