公开(公告)号：US20180293956A1

公开(公告)日：2018-10-11

申请号：US15840757

申请日：2017-12-13

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xing YAO ,  Seung-Woo HAN ,  Guangliang SHANG ,  Mingfu HAN ,  Haoliang ZHENG ,  Yun-Sik IM

IPC: G09G5/00 ,  G11C19/18 ,  G11C19/28

Abstract: The present disclosure relates to an array substrate, a display panel and a display device. The array substrate includes a plurality of shift register units, a plurality of gate lines and a plurality of data lines crossing the plurality of gate lines. The plurality of gate lines crossing the plurality of data lines defines a plurality of pixel regions. Each of the pixel regions is divided into a driving zone and a pixel unit zone. A plurality of the driving zones in a same column constitute at least one unit region and each of the shift register units is disposed in one of the unit regions to provide scanning signals to the gate line connected thereto.

公开(公告)号：US20190027079A1

公开(公告)日：2019-01-24

申请号：US15577402

申请日：2017-05-03

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Guangliang SHANG ,  Xing YAO ,  Mingfu HAN ,  Seung-Woo HAN ,  Yun-Sik IM ,  Jing LV ,  Yinglong HUANG ,  Jung-Mok JUN ,  Xue DONG ,  Haoliang ZHENG ,  Lijun YUAN ,  Zhichong WANG ,  Ji Ha KIM

IPC: G09G3/20 ,  G11C19/28

Abstract: A GOA signal determining circuit and method thereof, gate driver circuit, and display device are provided. The GOA signal determining circuit is connected to an input end of a GOA unit, at least two clock signal ends of the GOA unit, and a control end of a reset unit of a PU node in the GOA unit. The GOA signal determining circuit detects a signal of the input end of the GOA unit and a signal of the at least two clock signal ends of the GOA unit, and outputs a control signal to the reset unit of the PU node to control the reset unit to output a reset signal to the PU node to turn off an output transistor of the GOA unit, upon determining both of the signal of the input end and the signal of the at least two clock signal ends are abnormal.