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公开(公告)号：US20240221697A1
公开(公告)日：2024-07-04
申请号：US17923946
申请日：2021-11-16
Inventor： Junwei ZHANG , Feifei WANG , Wei HAO , Wengang SU , Kaimin YIN , Xingce SHANG , Taotao DUAN , Liguang GENG , Huangfei CHA , Yu DENG
IPC: G09G3/36 , G02F1/1335 , G02F1/13357 , H01L25/16
CPC classification number: G09G3/3611 , G02F1/133603 , G02F1/133612 , G09G2310/0243 , G09G2330/00 , H01L25/167
Abstract: A driver circuit includes a logic control component and a plurality of pins coupled to the logic control component. The plurality of pins include a clock pin, a data pin and at least two output pins. The clock pin is configured to receive a clock signal. The data pin is configured to receive, under control of the logic control component, a data signal in a period of an active level of the clock signal. The logic control component is configured to generate a driving control signal corresponding to each output pin according to the data signal, so as to control an electrical signal flowing through the output pin.
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公开(公告)号：US20230006121A1
公开(公告)日：2023-01-05
申请号：US17930514
申请日：2022-09-08
Inventor： Wengang SU , Wei HAO , Haiwei SUN , Lingyun SHI , Feifei WANG , Rui SHI
IPC: H01L33/62 , H01L25/075 , H01L33/60 , H01L23/48
Abstract: A backplane and a glass-based circuit board. The backplane includes: a base substrate and a plurality of light-emitting units, arranged in an array on the base substrate. Each of the light-emitting units includes at least one light-emitting sub-unit; the light-emitting sub-unit includes a connection line and a plurality of light-emitting diode chips connected with the connection line, and the light-emitting diode chips are located on a side of the connection line away from the base substrate. The connection line comprises a first connection portion, a second connection portion and a third connection portion; in each of the light-emitting sub-units, the third connection portion comprises a plurality of connection sub-portions, each of the connection sub-portions comprise at least one electrical contact point; the electrical contact points at adjacent ends of adjacent connection sub-portions constitute an electrical contact point pair.
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3.发明公开公开(公告)号：US20230282172A1
公开(公告)日：2023-09-07
申请号：US18016716
申请日：2021-06-21
Inventor： Kaimin YIN , Wei HAO , Lingyun SHI , Wenchieh HUANG , Feifei WANG , Wengang SU , Rui SHI , Xingce SHANG , Junwei ZHANG , Taotao DUAN
IPC: G09G3/3283
CPC classification number: G09G3/3283
Abstract: The present disclosure provides a driver circuit, a driving method of the driver circuit, an array substrate and a display device, belonging to the field of display technology. The driver circuit provided by the present disclosure includes a logic control module, a data pin and at least two output pins. The data pin is configured to receive driving data. The logic control module is configured to generate driving control signals in a one-to-one correspondence with the at least two output pins according to the driving data. The driving control signals are configured to control the current flowing through the corresponding output pins.
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公开(公告)号：US20220301489A1
公开(公告)日：2022-09-22
申请号：US17431182
申请日：2021-02-07
Inventor： Xiurong WANG , Wei HAO , Lingyun SHI , Qibing GU , Guofeng HU , Tao YANG , Mengmeng WANG , Wenhao LIU
Abstract: Provided are a pixel drive circuit, a drive circuit of a display panel, and a display apparatus. The pixel drive circuit includes a switch unit and a drive unit, the switch unit is connected to the drive unit, and the drive unit is configured to be connected to a plurality of sub-pixel units; the switch unit is configured to receive a scan signal and a data signal, be switched on under action of the scan signal, and send the data signal to the drive unit; and the drive unit is configured to send the data signal to the plurality of sub-pixel units connected thereto in a time division manner.
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公开(公告)号：US20220005990A1
公开(公告)日：2022-01-06
申请号：US16961439
申请日：2019-09-30
Inventor： Wengang SU , Haiwei SUN , Lingyun SHI , Wei HAO , Feifei WANG , Rui SHI
IPC: H01L33/62 , H01L25/075 , H01L33/60
Abstract: A backplane and a glass-based circuit board. The backplane includes: a base substrate and a plurality of light-emitting units, arranged in an array on the base substrate. Each of the light-emitting units (110) includes at least one light-emitting sub-unit; the light-emitting sub-unit includes a connection line (200) and a plurality of light-emitting diode chips connected with the connection line, and the light-emitting diode chips are located on a side of the connection line away from the base substrate. The light-emitting diode chips (300) in the at least one light-emitting sub-unit are connected in series.
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Patent Agency Ranking
公开(公告)号：US20250133893A1
公开(公告)日：2025-04-24
申请号：US18689874
申请日：2023-01-19
Inventor： Hai TANG , Wei HAO , Yiding SUN , Yongle FANG , Liang GAO , Xiaolin GENG
IPC: H10H29/85 , H01L25/075 , H10H29/80
Abstract: A wiring substrate, an electronic element and an electronic apparatus is provided according to the disclosure, the wiring substrate includes: a base substrate; connection lines located on the substrate, wherein at least two connection lines are configured to transmit different signals; a plurality of pads, wherein any two pads are distributed at intervals, and the pads include first pads; a first pad group composed of at least three first pads; wherein the connection lines include a first type of connection line, which includes a plurality of branch portions, different branch portions are connected with different first pads, and any two branch portions are arranged at intervals.
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公开(公告)号：US20240234657A1
公开(公告)日：2024-07-11
申请号：US17756513
申请日：2021-06-25
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Ming YANG , Xingce SHANG , Wei HAO , Zhenyu ZHANG , Fuqiang LI , Wanzhi CHEN
IPC: H01L33/62 , H01L25/075
CPC classification number: H01L33/62 , H01L25/0753
Abstract: The present disclosure provides an array substrate, a backlight and a display device which both include the array substrate. The array substrate includes multiple light-emitting units arranged in M rows and N columns and multiple first signal lines. Multiple first signal lines are divided into N groups, and each group of first signal lines is electrically connected to a column of light-emitting units. Each group of first signal lines includes at least two first signal lines, for each column of light-emitting units, at least two consecutive rows of light-emitting units are electrically connected to one of the at least two first signal lines, and the remaining at least one row of light-emitting unit is electrically connected to the other one of the at least two first signal lines, M is a positive integer greater than or equal to 3, N is a positive integer greater than or equal to 1.
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公开(公告)号：US20180261188A1
公开(公告)日：2018-09-13
申请号：US15528935
申请日：2016-10-12
Inventor： Luqiang GUO , Weihao HU , Wei HAO , Rui GUO , Jinhui CHENG , Chao ZHANG , Zhiming MENG , Boxiao LAN
CPC classification number: G09G5/10 , G09G3/20 , G09G3/2092 , G09G2320/0233 , G09G2320/048 , G09G2320/0693 , G09G2330/026 , G09G2330/10
Abstract: The present disclosure discloses a method and a display processing apparatus and a display device. The display processing method of the present disclosure for a display device, of which a display region includes a non-uniform display region, includes a time obtaining step of obtaining an operating time of the display device from a start time of the display device, and a data converting step of determining target display data for a to-be-compensated subpixel in the non-uniform display region based on the operating time.
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9.发明申请公开(公告)号：US20250140210A1
公开(公告)日：2025-05-01
申请号：US19010377
申请日：2025-01-06
Inventor： Kaimin YIN , Wei HAO , Lingyun SHI , Wenchieh HUANG , Feifei WANG , Wengang SU , Rui SHI , Xingce SHANG , Junwei ZHANG , Taotao DUAN
IPC: G09G3/3283
Abstract: The present disclosure provides a driver circuit, a driving method of the driver circuit, an array substrate and a display device, belonging to the field of display technology. The driver circuit provided by the present disclosure includes a logic control module, a data pin and at least two output pins. The data pin is configured to receive driving data. The logic control module is configured to generate driving control signals in a one-to-one correspondence with the at least two output pins according to the driving data. The driving control signals are configured to control the current flowing through the corresponding output pins.
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公开(公告)号：US20240428720A1
公开(公告)日：2024-12-26
申请号：US18290837
申请日：2023-01-19
Inventor： Junwei ZHANG , Wei HAO , Lingyun SHI , Xiaoyu ZHANG
Abstract: The present disclosure provides a driving chip, which includes: a first signal port and a second signal port; a logic control module connected to the first signal port and the second signal port, the logic control module being configured to configure, according to a configuration signal received by the first signal port or the second signal port, one of the first signal port or the second signal port as a signal input port, configure the other of the first signal port or the second signal port as a signal output port, and output the configuration signal or an updated configuration signal through the signal output port. The present disclosure further provides a method for configuring ports of the driving chip, a light emission driver, a backlight module and a display apparatus.
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