公开(公告)号：US11527408B2

公开(公告)日：2022-12-13

申请号：US16867095

申请日：2020-05-05

申请人： Applied Materials, Inc.

发明人： Tzu-shun Yang ,  Rui Cheng ,  Karthik Janakiraman ,  Zubin Huang ,  Diwakar Kedlaya ,  Meenakshi Gupta ,  Srinivas Guggilla ,  Yung-chen Lin ,  Hidetaka Oshio ,  Chao Li ,  Gene Lee

IPC分类号： H01L21/033 ,  H01L21/311 ,  H01L21/3213

摘要： The present disclosure provides forming nanostructures utilizing multiple patterning process with good profile control and feature transfer integrity. In one embodiment, a method for forming features on a substrate includes forming a first mandrel layer on a material layer disposed on a substrate. A first spacer layer is conformally formed on sidewalls of the first mandrel layer, wherein the first spacer layer comprises a doped silicon material. The first mandrel layer is selectively removed while keeping the first spacer layer. A second spacer layer is conformally formed on sidewalls of the first spacer layer and selectively removing the first spacer layer while keeping the second spacer layer.

公开(公告)号：US11456173B2

公开(公告)日：2022-09-27

申请号：US16797111

申请日：2020-02-21

申请人： Applied Materials, Inc.

发明人： Meenakshi Gupta ,  Rui Cheng ,  Srinivas Guggilla ,  Karthik Janakiraman ,  Diwakar N. Kedlaya ,  Zubin Huang

IPC分类号： H01L21/027 ,  H01L21/02 ,  H01L21/32

摘要： Embodiments for processing a substrate are provided and include a method of trimming photoresist to provide photoresist profiles with smooth sidewall surfaces and to tune critical dimensions (CD) for the patterned features and/or a subsequently deposited dielectric layer. The method can include depositing a sacrificial structure layer on the substrate, depositing a photoresist on the sacrificial structure layer, and patterning the photoresist to produce a crude photoresist profile on the sacrificial structure layer. The method also includes trimming the photoresist with a plasma to produce a refined photoresist profile covering a first portion of the sacrificial structure layer while a second portion of the sacrificial structure layer is exposed, etching the second portion of the sacrificial structure layer to form patterned features disposed on the substrate, and depositing a dielectric layer on the patterned features.

公开(公告)号：US11315787B2

公开(公告)日：2022-04-26

申请号：US16821759

申请日：2020-03-17

申请人： Applied Materials, Inc.

发明人： Tzu-shun Yang ,  Rui Cheng ,  Karthik Janakiraman ,  Zubin Huang ,  Diwakar Kedlaya ,  Meenakshi Gupta ,  Srinivas Guggilla ,  Yung-chen Lin ,  Hidetaka Oshio ,  Chao Li ,  Gene Lee

IPC分类号： H01L21/033 ,  H01L21/311 ,  H01L21/3213

摘要： The present disclosure provides forming nanostructures utilizing multiple patterning process with good profile control and feature transfer integrity. In one embodiment, a method for forming features on a substrate includes forming a mandrel layer on a substrate, conformally forming a spacer layer on the mandrel layer, wherein the spacer layer is a doped silicon material, and patterning the spacer layer. In another embodiment, a method for forming features on a substrate includes conformally forming a spacer layer on a mandrel layer on a substrate, wherein the spacer layer is a doped silicon material, selectively removing a portion of the spacer layer using a first gas mixture, and selectively removing the mandrel layer using a second gas mixture different from the first gas mixture.