公开(公告)号：US20240040808A1

公开(公告)日：2024-02-01

申请号：US18486919

申请日：2023-10-13

Applicant: Applied Materials, Inc.

Inventor： M. Arif Zeeshan ,  Kelvin Chan ,  Shantanu Kallakuri ,  Sony Varghese

IPC: H10B99/00 ,  C23C16/04 ,  C23C16/02

CPC classification number: H10B99/00 ,  C23C16/047 ,  C23C16/0281 ,  C23C16/45525

Abstract: In one embodiment, a method of selectively forming a deposit may include providing a substrate, the substrate having a plurality of surface features, extending at a non-zero angle of inclination with respect to a perpendicular to a plane of the substrate. The method may include directing a reactive beam to the plurality of surface features, the reactive beam defining a non-zero angle of incidence with respect to a perpendicular to the plane of the substrate, wherein a seed layer is deposited on a first portion of the surface features, and is not deposited on a second portion of the surface features. The method may further include exposing the substrate to a reactive deposition process after the directing the reactive ion beam, wherein a deposit layer selectively grows over the seed layer.

公开(公告)号：US20220119955A1

公开(公告)日：2022-04-21

申请号：US17072130

申请日：2020-10-16

Applicant: Applied Materials, Inc.

Inventor： M. Arif Zeeshan ,  Shantanu Kallakuri ,  Joseph C. Olson

IPC: C23C16/56 ,  C23C16/04

Abstract: Embodiments of the present disclosure include positioning a mask over a substrate, wherein the mask has a planar surface separated from a top surface of the substrate by a mask distance, and wherein a mask opening is provided through the planar surface. The method may further include positioning a mask element across the mask opening, the mask element including one or more solid portions and one or more openings, and depositing, through the mask opening, a deposition material onto the substrate, wherein the deposition material has a variable profile as a result of the one or more solid portions and the one or more openings.

公开(公告)号：US11956978B2

公开(公告)日：2024-04-09

申请号：US17011729

申请日：2020-09-03

Applicant: Applied Materials, Inc.

Inventor： M. Arif Zeeshan ,  Kelvin Chan ,  Shantanu Kallakuri ,  Sony Varghese

IPC: C23C16/04 ,  C23C14/22 ,  C23C16/02 ,  C23C16/455 ,  H10B99/00 ,  H01L21/285

CPC classification number: H10B99/00 ,  C23C16/0281 ,  C23C16/047 ,  C23C14/221 ,  C23C14/225 ,  C23C16/0209 ,  C23C16/45525 ,  H01L21/28562

Abstract: In one embodiment, a method of selectively forming a deposit may include
providing a substrate, the substrate having a plurality of surface features, extending at a non-zero angle of inclination with respect to a perpendicular to a plane of the substrate. The method may include directing a reactive beam to the plurality of surface features, the reactive beam defining a non-zero angle of incidence with respect to a perpendicular to the plane of the substrate, wherein a seed layer is deposited on a first portion of the surface features, and is not deposited on a second portion of the surface features. The method may further include exposing the substrate to a reactive deposition process after the directing the reactive ion beam, wherein a deposit layer selectively grows over the seed layer.

公开(公告)号：US11459652B2

公开(公告)日：2022-10-04

申请号：US17072143

申请日：2020-10-16

Applicant: Applied Materials, Inc.

Inventor： M. Arif Zeeshan ,  Tristan Y. Ma ,  Kelvin Chan

IPC: H01L21/02 ,  C23C16/02 ,  H01L21/285 ,  C23C16/505 ,  H01J37/32 ,  H01L21/288 ,  H01L27/108

Abstract: Embodiments herein include void-free material depositions on a substrate (e.g., in a void-free trench-filled (VFTF) component). In some embodiments, a method may include providing a plurality of device structures extending from a base, each of the plurality of device structures including a first sidewall opposite a second sidewall and a top surface extending between the first and second sidewalls, and providing a seed layer over the plurality of device structures. The method may further include forming a dielectric layer along just the top surface and along an upper portion of the first and second sidewalls using an angled deposition delivered to the plurality of device structures at a non-zero angle of inclination relative to a perpendicular extending from an upper surface of the base, and forming a fill material within one or more trenches defined by the plurality of device structures.

公开(公告)号：US20220100078A1

公开(公告)日：2022-03-31

申请号：US17032520

申请日：2020-09-25

Applicant: Applied Materials, Inc.

Inventor： M. Arif Zeeshan ,  Ross Bandy ,  Peter F. Kurunczi ,  Shantanu Kallakuri ,  Thomas Soldi ,  Joseph C. Olson

IPC: G03F1/36 ,  G03F1/80 ,  G03F1/70 ,  G03F1/74

Abstract: Methods and devices for producing substrates with variable height features are provided. In one example, a proximity mask may include a plate positioned over a substrate, wherein at least a portion of the plate is separated from the substrate by a distance. The plate may include a first opening and a second opening, wherein the first opening is defined by a first perimeter having a first shape, wherein the second opening is defined by a second perimeter having a second shape, and wherein the first shape is different than the second shape.

公开(公告)号：US20220093458A1

公开(公告)日：2022-03-24

申请号：US17028259

申请日：2020-09-22

Applicant: Applied Materials, Inc.

Inventor： M. Arif Zeeshan ,  Kelvin Chan ,  Shantanu Kallakuri ,  Sony Varghese ,  John Hautala

IPC: H01L21/768 ,  H01L21/48

Abstract: Embodiments herein include void-free material depositions on a substrate (e.g., in a void-free trench-filled (VFTF) component) obtained using directional etching to remove predetermined portions of a seed layer covering the substrate. In several embodiments, directional etching followed by selective deposition can enable fill material (e.g., metal) patterning in tight spaces without any voids or seams. Void-free material depositions may be used in a variety of semiconductor devices, such as transistors, dual work function stacks, dynamic random-access memory (DRAM), non-volatile memory, and the like.

公开(公告)号：US12131948B2

公开(公告)日：2024-10-29

申请号：US18224904

申请日：2023-07-21

Applicant: Applied Materials, Inc.

Inventor： M. Arif Zeeshan ,  Kelvin Chan ,  Shantanu Kallakuri ,  Sony Varghese ,  John Hautala

IPC: H01L21/768 ,  H01L21/48

CPC classification number: H01L21/76879 ,  H01L21/486

Abstract: Embodiments herein include void-free material depositions on a substrate (e.g., in a void-free trench-filled (VFTF) component) obtained using directional etching to remove predetermined portions of a seed layer covering the substrate. In several embodiments, directional etching followed by selective deposition can enable fill material (e.g., metal) patterning in tight spaces without any voids or seams. Void-free material depositions may be used in a variety of semiconductor devices, such as transistors, dual work function stacks, dynamic random-access memory (DRAM), non-volatile memory, and the like.

公开(公告)号：US11749564B2

公开(公告)日：2023-09-05

申请号：US17028259

申请日：2020-09-22

Applicant: Applied Materials, Inc.

Inventor： M. Arif Zeeshan ,  Kelvin Chan ,  Shantanu Kallakuri ,  Sony Varghese ,  John Hautala

IPC: H01L21/768 ,  H01L21/48

CPC classification number: H01L21/76879 ,  H01L21/486

Abstract: Embodiments herein include void-free material depositions on a substrate (e.g., in a void-free trench-filled (VFTF) component) obtained using directional etching to remove predetermined portions of a seed layer covering the substrate. In several embodiments, directional etching followed by selective deposition can enable fill material (e.g., metal) patterning in tight spaces without any voids or seams. Void-free material depositions may be used in a variety of semiconductor devices, such as transistors, dual work function stacks, dynamic random-access memory (DRAM), non-volatile memory, and the like.

公开(公告)号：US20220404115A1

公开(公告)日：2022-12-22

申请号：US17893559

申请日：2022-08-23

Applicant: Applied Materials, Inc.

Inventor： M. Arif Zeeshan ,  Tristan Y. Ma ,  Kelvin Chan

IPC: F41B3/02

Abstract: Embodiments herein include void-free material depositions on a substrate (e.g., in a void-free trench-filled (VFTF) component). In some embodiments, a method may include providing a plurality of device structures extending from a base, each of the plurality of device structures including a first sidewall opposite a second sidewall and a top surface extending between the first and second sidewalls, and providing a seed layer over the plurality of device structures. The method may further include forming a dielectric layer along just the top surface and along an upper portion of the first and second sidewalls using an angled deposition delivered to the plurality of device structures at a non-zero angle of inclination relative to a perpendicular extending from an upper surface of the base, and forming a fill material within one or more trenches defined by the plurality of device structures.

公开(公告)号：US20230369112A1

公开(公告)日：2023-11-16

申请号：US18224904

申请日：2023-07-21

Applicant: Applied Materials, Inc.

Inventor： M. Arif Zeeshan ,  Kelvin Chan ,  Shantanu Kallakuri ,  Sony Varghese ,  John Hautala

IPC: H01L21/768 ,  H01L21/48

CPC classification number: H01L21/76879 ,  H01L21/486

Abstract: Embodiments herein include void-free material depositions on a substrate (e.g., in a void-free trench-filled (VFTF) component) obtained using directional etching to remove predetermined portions of a seed layer covering the substrate. In several embodiments, directional etching followed by selective deposition can enable fill material (e.g., metal) patterning in tight spaces without any voids or seams. Void-free material depositions may be used in a variety of semiconductor devices, such as transistors, dual work function stacks, dynamic random-access memory (DRAM), non-volatile memory, and the like.