公开(公告)号：US20190393072A1

公开(公告)日：2019-12-26

申请号：US16437048

申请日：2019-06-11

Applicant: Applied Materials, Inc.

Inventor： Abdul Aziz KHAJA ,  Liangfa HU ,  Sudha S. RATHI ,  Ganesh BALASUBRAMANIAN

IPC: H01L21/687 ,  H01L21/67

Abstract: The present disclosure generally relates to substrate supports for semiconductor processing. In one embodiment, a substrate support is provided. The substrate support includes a body comprising a substrate chucking surface, an electrode disposed within the body, a plurality of substrate supporting features formed on the substrate chucking surface, wherein the number of substrate supporting features increases radially from a center of the substrate chucking surface to an edge of the substrate chucking surface, and a seasoning layer formed on the plurality of the substrate supporting features, the seasoning layer comprising a silicon nitride.

公开(公告)号：US20230386883A1

公开(公告)日：2023-11-30

申请号：US18233751

申请日：2023-08-14

Applicant: Applied Materials, Inc.

Inventor： Liangfa HU ,  Abdul Aziz KHAJA ,  Sarah Michelle BOBEK ,  Prashant Kumar KULSHRESHTHA ,  Yoichi SUZUKI

IPC: H01L21/683 ,  H01L21/26 ,  H01L21/687

CPC classification number: H01L21/6833 ,  H01L21/26 ,  H01L21/68735

Abstract: Embodiments of the present disclosure generally relate to apparatus and methods for reducing substrate backside damage during semiconductor device processing. In one implementation, a method of chucking a substrate in a substrate process chamber includes exposing the substrate to a plasma preheat treatment prior to applying a chucking voltage to a substrate support. In one implementation, a substrate support is provided and includes a body having an electrode and thermal control device disposed therein. A plurality of substrate supporting features are formed on an upper surface of the body, each of the substrate supporting features having a substrate supporting surface and a rounded edge.

公开(公告)号：US20230151487A1

公开(公告)日：2023-05-18

申请号：US18099371

申请日：2023-01-20

Applicant: Applied Materials, Inc.

Inventor： Liangfa HU ,  Prashant Kumar KULSHRESHTHA ,  Anjana M. PATEL ,  Abdul Aziz KHAJA ,  Viren KALSEKAR ,  Vinay K. PRABHAKAR ,  Satya Teja Babu THOKACHICHU ,  Byung Seok KWON ,  Ratsamee LIMDULPAIBOON ,  Kwangduk Douglas LEE ,  Ganesh BALASUBRAMANIAN

IPC: C23C16/455 ,  C23C16/505 ,  C23C16/44

CPC classification number: C23C16/455 ,  C23C16/505 ,  C23C16/45597 ,  C23C16/4401 ,  C23C16/4408 ,  C23C16/45519

Abstract: The present disclosure relates to systems and methods for reducing the formation of hardware residue and minimizing secondary plasma formation during substrate processing in a process chamber. The process chamber may include a gas distribution member configured to flow a first gas into a process volume and generate a plasma therefrom. A second gas is supplied into a lower region of the process volume. Further, an exhaust port is disposed in the lower region to remove excess gases or by-products from the process volume during or after processing.