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Patent Agency Ranking
公开(公告)号：US20180083648A1
公开(公告)日：2018-03-22
申请号：US15697233
申请日：2017-09-06
Applicant: Apple Inc.
Inventor： Baris Cagdaser , Derek K. Shaeffer , Hopil Bae , Jesse Aaron Richmond , Jie Won Ryu , Kingsuk Brahma , Mohammad B. Vahid Far , Shingo Hatanaka , Yafei Bi , Yuichi Okuda
CPC classification number: H03M1/785 , G09G2320/0276 , H03M1/682 , H03M1/747 , H03M1/765
Abstract: A device includes a resistor string that includes a plurality resistors with voltage taps disposed therebetween. The device may select one particular voltage tap of the plurality of voltage taps based on received gray level data for a pixel of a display. The device also includes a first amplifier that may be coupled to a first terminal end of the resistor string. The device additionally includes a second amplifier that may be coupled to a second terminal end of the resistor string, wherein the plurality of voltage taps may each supply a tap voltage derived from a voltage between the first amplifier and the second amplifier, wherein any tap amplifier of the device coupled to a voltage tap of the plurality of voltage taps provides a reference voltage thereto.
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公开(公告)号：US20210056930A1
公开(公告)日：2021-02-25
申请号：US16928882
申请日：2020-07-14
Applicant: Apple Inc.
Inventor： Jaeyoung Kang , Jesse Aaron Richmond , Mahdi Farrokh Baroughi , Hopil Bae , John T. Wetherell , Kingsuk Brahma , Yuichi Okuda , Shingo Hatanaka , Baris Cagdaser , Myungjoon Choi , Jie Won Ryu , Hyunwoo Nho , Yafei Bi , Wei H. Yao , Henry C. Jen , Derek Keith Shaeffer
Abstract: An electronic device may include an electronic display having multiple display pixels. The display pixels may illuminate at a target luminance based at least in part on a first analog voltage signal. The electronic device may also include an electrical bus configured to generate multiple analog voltage signals including the first analog voltage signal, which is output on an output of the electrical bus. The electrical bus may include a digital to analog converter to generate at least some of the analog voltage signals and multiple output buffers to buffer the analog voltage signals. The outputs may be buffered by an output buffer of the output buffers.
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公开(公告)号：US20210056904A1
公开(公告)日：2021-02-25
申请号：US16905895
申请日：2020-06-18
Applicant: Apple Inc.
Inventor： Shingo Hatanaka , Derek Keith Shaeffer , John T. Wetherell , Nobutaka Shimamura , Yuichi Okuda , Jaeyoung Kang
IPC: G09G3/3258 , H03F3/30
Abstract: A system includes a pixel that emits light based on a signal provided to the pixel. The system may also include a buffer circuit having a differential pair stage, a cascade stage, and an output stage. The differential pair stage may receive a common mode voltage signal via a first switch in response to the first switch receiving a first signal that causes the first switch to close. The differential pair stage may couple a capacitor to the output stage via a second switch that operate based on a second signal, such that the capacitor reduces an offset provided by one or more circuit components in the differential pair stage, the cascade stage, the output stage, or any combination thereof. The differential pair stage may output the common mode voltage to the pixel via the output stage in response to the first signal being present.
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公开(公告)号：US11176888B2
公开(公告)日：2021-11-16
申请号：US16905895
申请日：2020-06-18
Applicant: Apple Inc.
Inventor： Shingo Hatanaka , Derek Keith Shaeffer , John T. Wetherell , Nobutaka Shimamura , Yuichi Okuda , Jaeyoung Kang
IPC: G09G3/3258 , H03F3/30
Abstract: A system includes a pixel that emits light based on a signal provided to the pixel. The system may also include a buffer circuit having a differential pair stage, a cascade stage, and an output stage. The differential pair stage may receive a common mode voltage signal via a first switch in response to the first switch receiving a first signal that causes the first switch to close. The differential pair stage may couple a capacitor to the output stage via a second switch that operate based on a second signal, such that the capacitor reduces an offset provided by one or more circuit components in the differential pair stage, the cascade stage, the output stage, or any combination thereof. The differential pair stage may output the common mode voltage to the pixel via the output stage in response to the first signal being present.
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公开(公告)号：US10200059B2
公开(公告)日：2019-02-05
申请号：US15697233
申请日：2017-09-06
Applicant: Apple Inc.
Inventor： Baris Cagdaser , Derek K. Shaeffer , Hopil Bae , Jesse Aaron Richmond , Jie Won Ryu , Kingsuk Brahma , Mohammad B. Vahid Far , Shingo Hatanaka , Yafei Bi , Yuichi Okuda
Abstract: A device includes a resistor string that includes a plurality resistors with voltage taps disposed therebetween. The device may select one particular voltage tap of the plurality of voltage taps based on received gray level data for a pixel of a display. The device also includes a first amplifier that may be coupled to a first terminal end of the resistor string. The device additionally includes a second amplifier that may be coupled to a second terminal end of the resistor string, wherein the plurality of voltage taps may each supply a tap voltage derived from a voltage between the first amplifier and the second amplifier, wherein any tap amplifier of the device coupled to a voltage tap of the plurality of voltage taps provides a reference voltage thereto.
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