公开(公告)号：US20200053377A1

公开(公告)日：2020-02-13

申请号：US16100772

申请日：2018-08-10

Applicant: Apple Inc.

Inventor： Muge Wang ,  Sheng Lin ,  Weichun Ku ,  Hsiao-Chen Chang ,  Yixiang Tao

IPC: H04N19/513 ,  H04N19/176 ,  G06T5/00 ,  H04N1/60 ,  G06T3/00

Abstract: Embodiments of the present disclosure relate to generating motion vectors. An image signal processor includes a statistics circuit and a vector correlation analysis circuit. The statistics circuit determines image statistics such as vectors representing sums of pixel values of rows or columns of blocks of an image. Additionally, the statistics circuit may mix or aggregate sums of multiple color components. The vector correlation analysis performs cross-correlation between vectors of a current image and reference vectors of a prior image to determine cross-correlation scores. The vector correlation analysis generates a motion vector by identifying shifts in horizontal and vertical directions corresponding to peak values of cross-correlation scores.

公开(公告)号：US20220036163A1

公开(公告)日：2022-02-03

申请号：US16942263

申请日：2020-07-29

Applicant: Apple Inc.

Inventor： Ponan Kuo ,  Hsiao-Chen Chang ,  Ji Liang Song

IPC: G06N3/063 ,  G06N3/04

Abstract: Embodiments relate to a neural processor circuit that includes a first number of neural engine circuits, a second number of channels and a data processor circuit. The first number of neural engine circuits are pipelined into the second number of chains smaller than the first number. Each of the chains is configured to generate output data of a first size. Each of the channels is coupled to each of the chains and configured to transmit the output data from each of the neural engine circuits in the chains sequentially. The data processor circuit is coupled to the channels to receive the output data. The data processor circuit aggregates the output data of each of the chains into aggregated data of a second size larger than the first size and writes the aggregated data of the second size into a buffer memory of the data processor circuit.

公开(公告)号：US10547863B1

公开(公告)日：2020-01-28

申请号：US16100772

申请日：2018-08-10

Applicant: Apple Inc.

Inventor： Muge Wang ,  Sheng Lin ,  Weichun Ku ,  Hsiao-Chen Chang ,  Yixiang Tao

IPC: H04N19/513 ,  H04N19/176 ,  G06T3/00 ,  H04N1/60 ,  G06T5/00

Abstract: Embodiments of the present disclosure relate to generating motion vectors. An image signal processor includes a statistics circuit and a vector correlation analysis circuit. The statistics circuit determines image statistics such as vectors representing sums of pixel values of rows or columns of blocks of an image. Additionally, the statistics circuit may mix or aggregate sums of multiple color components. The vector correlation analysis performs cross-correlation between vectors of a current image and reference vectors of a prior image to determine cross-correlation scores. The vector correlation analysis generates a motion vector by identifying shifts in horizontal and vertical directions corresponding to peak values of cross-correlation scores.