公开(公告)号：US20130212318A1

公开(公告)日：2013-08-15

申请号：US13725671

申请日：2012-12-21

Applicant: Apple Inc.

Inventor： Tahoma Toelkes ,  Nir Jacob Wakrat ,  Kenneth L. Herman ,  Barry Corlett ,  Vadim Khmelnitsky ,  Anthony Fai ,  Daniel Jeffrey Post ,  Hsiao Thio

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F12/0607 ,  G06F2212/1016 ,  G06F2212/7208

Abstract: The disclosed architecture uses address mapping to map a block address on a host interface to an internal block address of a non-volatile memory (NVM) device. The block address is mapped to an internal chip select for selecting a Concurrently Addressable Unit (CAU) identified by the block address. The disclosed architecture supports generic NVM commands for read, write, erase and get status operations. The architecture also supports an extended command set for supporting read and write operations that leverage a multiple CAU architecture.

Abstract translation: 所公开的架构使用地址映射将主机接口上的块地址映射到非易失性存储器（NVM）设备的内部块地址。 块地址映射到用于选择由块地址标识的可并行寻址单元（CAU）的内部芯片选择。 所公开的架构支持用于读取，写入，擦除和获取状态操作的通用NVM命令。 该架构还支持扩展命令集，以支持利用多个CAU架构的读写操作。

公开(公告)号：US08862851B2

公开(公告)日：2014-10-14

申请号：US13725671

申请日：2012-12-21

Applicant: Apple Inc.

Inventor： Tahoma Toelkes ,  Nir Jacob Wakrat ,  Kenneth L Herman ,  Barry Corlett ,  Vadim Khmelnitsky ,  Anthony Fai ,  Daniel Jeffrey Post ,  Hsiao Thio

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F12/02 ,  G06F12/06

CPC classification number: G06F12/0246 ,  G06F12/0607 ,  G06F2212/1016 ,  G06F2212/7208

Abstract: The disclosed architecture uses address mapping to map a block address on a host interface to an internal block address of a non-volatile memory (NVM) device. The block address is mapped to an internal chip select for selecting a Concurrently Addressable Unit (CAU) identified by the block address. The disclosed architecture supports generic NVM commands for read, write, erase and get status operations. The architecture also supports an extended command set for supporting read and write operations that leverage a multiple CAU architecture.

Abstract translation: 所公开的架构使用地址映射将主机接口上的块地址映射到非易失性存储器（NVM）设备的内部块地址。 块地址映射到用于选择由块地址标识的可并行寻址单元（CAU）的内部芯片选择。 所公开的架构支持用于读取，写入，擦除和获取状态操作的通用NVM命令。 该架构还支持扩展命令集，以支持利用多个CAU架构的读写操作。