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公开(公告)号:US12160497B2
公开(公告)日:2024-12-03
申请号:US18152492
申请日:2023-01-10
Applicant: Apple Inc.
Inventor: Hairong Yu , Boon-Aik Ang , Yu Chen , Litesh Sajnani , Samed Maltabas , Shaobo Liu , Gregory N. Santos , Richard Y. Su , Meei-Ling Chiang , Pyoungwon Park , Dennis M Fischette, Jr.
Abstract: A clock generator circuit may include a multiplex circuit and a phase-locked loop circuit. The multiplex circuit may generate a reference clock signal for the phase-locked loop circuit by selecting one of different clock signals. In response to a switch of the reference clock signal from one clock signal to another, the phase-locked loop circuit may disable phase-locking and enter into a frequency acquisition mode during which the frequency of the phase-locked loop circuit's output clock signal is adjusted based on the frequency of the newly selected reference clock signal. After a period of time has elapsed, the phase-locked loop circuit returns to phase-locking operation.
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公开(公告)号:US12206397B2
公开(公告)日:2025-01-21
申请号:US17949454
申请日:2022-09-21
Applicant: Apple Inc.
Inventor: Yueming He , Dennis M Fischette, Jr.
IPC: H03K17/16 , H03K19/003
Abstract: An integrated circuit may be provided with power switching circuitry. The power switching circuitry may include a primary power switch and multiple auxiliary power switches. A power gating control circuit may output control signals for selectively activating the primary power switch and at least one of the auxiliary power switches to charge a gated voltage. One or more voltage detectors may be configured to monitor the gated voltage and to activate the remaining auxiliary power switches in response to detecting that the gated voltage exceeds one or more thresholds. Configured and operated in this way, inrush current surge protection can be achieved while charging up the gated voltage sufficiently fast.
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