公开(公告)号：US20250094565A1

公开(公告)日：2025-03-20

申请号：US18790895

申请日：2024-07-31

Applicant: Apple Inc.

Inventor： Peter A. Lisherness ,  Assaf Menachem ,  Assaf Metuki ,  Benjamin Biron ,  D J Capelis ,  Husam Khashiboun ,  Jacques Fortier

IPC: G06F21/53 ,  G06F21/62

Abstract: Techniques are disclosed relating to securing hardware accelerators used by a computing device. In some embodiments, a computing device includes user interface and user interface pipeline circuitry coupled to the user interface. The user interface pipeline circuitry is configured to process a set of data received from a first source to produce an output for the user interface of the computing device, receive, from a second source, an indication that a component of the computing device has been activated, and, prior to presenting the output via the user interface, insert, into the output, an indicator of the component being activated.

公开(公告)号：US20250094564A1

公开(公告)日：2025-03-20

申请号：US18790765

申请日：2024-07-31

Applicant: Apple Inc.

Inventor： Peter A. Lisherness ,  Assaf Menachem ,  Assaf Metuki ,  Benjamin Biron ,  D J Capelis ,  Husam Khashiboun ,  Jacques Fortier

IPC: G06F21/53 ,  G06F21/62

Abstract: Techniques are disclosed relating to securing hardware accelerators used by a computing device. In some embodiments, a computing device includes a sensor and sensor processor circuitry coupled to the sensor. The sensor processor circuitry is configured to process sensor data received from a sensor of the computing device. In response to a first indication that a first consumer is trustworthy, the sensor processor circuitry is configured to provide a first data set of the processed sensor data to the first consumer. In response to a second indication that a second consumer is untrustworthy, the sensor processor circuitry is configured to negotiate one or more conditions in which the second consumer is permitted to receive a second data set of the processed sensor data.

公开(公告)号：US20250094563A1

公开(公告)日：2025-03-20

申请号：US18790529

申请日：2024-07-31

Applicant: Apple Inc.

Inventor： Peter A. Lisherness ,  Assaf Menachem ,  Assaf Metuki ,  Benjamin Biron ,  D J Capelis ,  Husam Khashiboun ,  Jacques Fortier ,  Kenneth W. Waters

IPC: G06F21/53 ,  G06F21/54

Abstract: Techniques are disclosed relating to securing hardware accelerators used by a computing device. In some embodiments, a computing device includes one or more processors configured to co-execute trusted processes and untrusted processes in an isolated manner that includes implementing a secure environment in which a set of security criteria is enforced for data of the trusted processes. The computing device further includes multiple heterogenous hardware accelerators configured to implement exclaves of the secure environment that extend enforcement of one or more of the set of security criteria within the hardware accelerators for data distributed to the hardware accelerators for performance of tasks associated with the trusted processes.