公开(公告)号：US20190075653A1

公开(公告)日：2019-03-07

申请号：US15696102

申请日：2017-09-05

Applicant: Apple Inc.

Inventor： Mark J. Beesley ,  Albert A. Onderick, II ,  Anne M. Mason ,  Craig A. Gammel ,  Shawn X. Arnold

IPC: H05K1/11 ,  H05K3/42 ,  H05K3/00

CPC classification number: H05K1/112 ,  H05K1/11 ,  H05K1/114 ,  H05K1/115 ,  H05K1/14 ,  H05K3/0017 ,  H05K3/0047 ,  H05K3/3436 ,  H05K3/425 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/09227 ,  H05K2201/0959 ,  H05K2201/09645 ,  H05K2201/10734

Abstract: Printed circuit boards having an increased density of vertical interconnect paths, as well as methods for their manufacture. One example may provide a printed circuit board having an increased density of vertical interconnect paths by forming a plurality of segmented vias. The segmented vias may extend through interior layers of the printed circuit board. The segmented vias may be formed of portions of vias in the interior layers of the printed circuit board. An area between three or more segmented vias may be filled with resin or other material or materials.

公开(公告)号：US10420213B2

公开(公告)日：2019-09-17

申请号：US15696102

申请日：2017-09-05

Applicant: Apple Inc.

Inventor： Mark J. Beesley ,  Albert A. Onderick, II ,  Anne M. Mason ,  Craig A. Gammel ,  Shawn X. Arnold

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/42 ,  H05K1/14

Abstract: Printed circuit boards having an increased density of vertical interconnect paths, as well as methods for their manufacture. One example may provide a printed circuit board having an increased density of vertical interconnect paths by forming a plurality of segmented vias. The segmented vias may extend through interior layers of the printed circuit board. The segmented vias may be formed of portions of vias in the interior layers of the printed circuit board. An area between three or more segmented vias may be filled with resin or other material or materials.