公开(公告)号：US10236221B2

公开(公告)日：2019-03-19

申请号：US15600678

申请日：2017-05-19

Applicant: Analog Devices Global

Inventor： Alan John Blennerhassett

IPC: H01L21/8238 ,  H01L21/768 ,  H01L21/762 ,  H01L29/06 ,  H01L23/522 ,  H01L23/64 ,  H01L49/02 ,  H01L21/76 ,  H01L21/8234 ,  H01L23/14 ,  H01G4/06

Abstract: Integrated digital isolators comprise a first transformer coil or capacitor plate mounted on an integrated circuit substrate, and separated from a second transformer coil or capacitor plate via an electrically insulating isolation layer. The electrical isolation that is achieved is dependent upon the material and thickness of the isolation layer. In order to reduce the amount of time required for fabrication while still allowing thick isolation layers to be deployed, in examples of the disclosure a pre-formed solid layer of dielectric material is bonded to the substrate over the first transformer coil or capacitive plate. The preformed solid layer is formed from a thick layer of solid dielectric material, which is ground to the required thickness, either prior to being bonded to the circuit substrate, or thereafter. Such techniques result in a thick isolation layer that is formed more quickly and with lower outgassing risk than conventional spin-coating or deposition techniques.

公开(公告)号：US20180337085A1

公开(公告)日：2018-11-22

申请号：US15600678

申请日：2017-05-19

Applicant: Analog Devices Global

Inventor： Alan John Blennerhassett

IPC: H01L21/768 ,  H01L21/762 ,  H01L29/06

CPC classification number: H01L21/823878 ,  H01G4/06 ,  H01L21/76 ,  H01L21/762 ,  H01L21/768 ,  H01L21/7687 ,  H01L21/823481 ,  H01L23/147 ,  H01L23/5222 ,  H01L23/5227 ,  H01L23/642 ,  H01L23/645 ,  H01L28/10 ,  H01L28/40 ,  H01L29/0649

Abstract: Integrated digital isolators comprise a first transformer coil or capacitor plate mounted on an integrated circuit substrate, and separated from a second transformer coil or capacitor plate via an electrically insulating isolation layer. The electrical isolation that is achieved is dependent upon the material and thickness of the isolation layer. In order to reduce the amount of time required for fabrication whilst still allowing thick isolation layers to be deployed, in examples of the disclosure a pre-formed solid layer of dielectric material is bonded to the substrate over the first transformer coil or capacitive plate. The preformed solid layer is formed from a thick layer of solid dielectric material, which is ground to the required thickness, either prior to being bonded to the circuit substrate, or thereafter. Such techniques result in a thick isolation layer that is formed more quickly and with lower outgassing risk than conventional spin-coating or deposition techniques.

公开(公告)号：US10290532B2

公开(公告)日：2019-05-14

申请号：US15600664

申请日：2017-05-19

Applicant: Analog Devices Global

Inventor： Alan John Blennerhassett ,  Bernard Patrick Stenson

IPC: H01L21/76 ,  H01L21/768 ,  H01L21/8238 ,  H01L23/522 ,  H01L23/528 ,  H01L21/8234 ,  H01L23/64 ,  H01F17/00 ,  H01L29/06 ,  H01G4/06

Abstract: Integrated digital isolators comprise a first transformer coil or capacitor plate mounted on an integrated circuit substrate, and separated from a second transformer coil or capacitor plate via an electrically insulating isolation layer. The electrical isolation that is achieved is dependent upon the material and thickness of the isolation layer. In order to reduce the amount of time required for fabrication while still allowing thick isolation layers to be deployed, in examples of the disclosure pre-formed sheets or tapes of dielectric material are applied to the substrate over the first transformer coil or capacitive plate, for example by being rolled onto the substrate using a heated roller. Such a technique results in a thick isolation layer that is formed using a simple process and much more quickly and reliably than conventional spin-coating or deposition techniques.

公开(公告)号：US20180337084A1

公开(公告)日：2018-11-22

申请号：US15600664

申请日：2017-05-19

Applicant: Analog Devices Global

Inventor： Alan John Blennerhassett ,  Bernard Patrick Stenson

IPC: H01L21/768

CPC classification number: H01L21/768 ,  H01F17/00 ,  H01G4/06 ,  H01L21/7682 ,  H01L21/7687 ,  H01L23/5227 ,  H01L29/0649

Abstract: Integrated digital isolators comprise a first transformer coil or capacitor plate mounted on an integrated circuit substrate, and separated from a second transformer coil or capacitor plate via an electrically insulating isolation layer. The electrical isolation that is achieved is dependent upon the material and thickness of the isolation layer. In order to reduce the amount of time required for fabrication while still allowing thick isolation layers to be deployed, in examples of the disclosure pre-formed sheets or tapes of dielectric material are applied to the substrate over the first transformer coil or capacitive plate, for example by being rolled onto the substrate using a heated roller. Such a technique results in a thick isolation layer that is formed using a simple process and much more quickly and reliably than conventional spin-coating or deposition techniques.