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公开(公告)号:US11966750B2
公开(公告)日:2024-04-23
申请号:US17809891
申请日:2022-06-29
申请人: Ampere Computing LLC
发明人: Shivnandan Kaushik , Harb Abdulhamid , Vanshidhar Konda , Yogesh Bansal , Sachhidh Kannan , Sebastien Hily
IPC分类号: G06F9/4401 , G06F9/48 , G06F15/173
CPC分类号: G06F9/4403 , G06F9/4812 , G06F15/17381
摘要: Disclosed are techniques for management of multiple processor cores in a multi-core system-on-chip (SoC). In an implementation, the SoC may configure each processor core in a first subset of processor cores as a management controller for performing system management functions for processor cores not in the first subset, the first subset comprising at least one processor core from the plurality of processor cores. System management functions are handled by the processor cores in the first subset, while operating system functions are handled by the processor cores not in the first subset. In an implementation, the number of processor cores to be included in the first subset (which may be zero if it is desired that the SoC may operate in legacy mode), may be controlled at boot time according to a boot setting.
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公开(公告)号:US11977638B2
公开(公告)日:2024-05-07
申请号:US17809888
申请日:2022-06-29
申请人: Ampere Computing LLC
CPC分类号: G06F21/572 , G06F8/65 , G06F8/656
摘要: Disclosed are techniques for performing a low-impact firmware update to a first microcontroller. In an aspect, a security entity communicatively coupled to the first microcontroller receives an update to firmware of the first microcontroller, authenticates the update to the firmware of the first microcontroller to prevent a security-related rollback, offloads system management tasks and interrupt handling from the first microcontroller to at least a second microcontroller communicatively coupled to the first microcontroller, coordinates installation of the update to the firmware of the first microcontroller without taking processing cycles from host software, and restores, to the first microcontroller, system management states occurring after the system management tasks and interrupt handling are offloaded from the first microcontroller.
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公开(公告)号:US20230176749A1
公开(公告)日:2023-06-08
申请号:US17963803
申请日:2022-10-11
申请人: Ampere Computing LLC
发明人: Sebastien Hily , Nagi Aboulenein , Matthew Robert Erler , Shivnandan Kaushik , Donald Scott Phillips
IPC分类号: G06F3/06
CPC分类号: G06F3/0619 , G06F3/0659 , G06F3/0673
摘要: Address range memory mirroring in a computer system, and related methods and computer-readable media. The computer system includes one or more memory mirror agents that are each configured to be programmed to mirror write data of a write request to a memory address mapped to the memory mirror agent. The memory mirror agent is configured to mirror write data to a redundant memory space in memory if the write memory address is within a programmed memory space to be mirrored by the memory mirror agent. The memory mirror agent can be programmed to perform memory mirroring based on specific address ranges to provide flexibility in controlling and changing the exact memory space of the memory system to be mirrored. If an error is detected in read data in response to a memory read request, the memory mirror agent can retrieve the stored redundant data to maintain data integrity.
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