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公开(公告)号：US11784457B2
公开(公告)日：2023-10-10
申请号：US17472648
申请日：2021-09-12
IPC分类号： H01S5/02208 , H01S5/02234 , H01S5/02345
CPC分类号： H01S5/02208 , H01S5/02234 , H01S5/02345
摘要： A packaged electronic device structure includes a substrate having a major surface. A semiconductor device is connected to the major surface of the substrate, the semiconductor device having a first major surface, a second major surface opposite to the first major surface, and a side surface extending between the first major surface and the second major surface. A package body encapsulates a portion of the semiconductor device, wherein the side surface of the semiconductor device is exposed through a side surface of the package body. In some examples, the side surface of the semiconductor device is an active surface. In some examples, the package body comprises a molded structure that contacts and overlaps the first major surface of the semiconductor device.
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公开(公告)号：US11742327B2
公开(公告)日：2023-08-29
申请号：US17325872
申请日：2021-05-20
发明人： Shaun Bowers , Ramakanth Alapati
IPC分类号： H01L25/065 , H01L25/00
CPC分类号： H01L25/0657 , H01L25/50 , H01L2225/06524 , H01L2225/06562 , H01L2225/06586
摘要： A packaged semiconductor device includes a substrate with first and second opposing major surfaces. A stacked semiconductor device structure is connected to the first major surface and includes a plurality of semiconductor die having terminals. Conductive interconnect structures electrically connect the terminals of the semiconductor dies together. The semiconductor dies are stacked together so that the terminals are exposed, and the stacked semiconductor device structure comprises a stepped profile. The conductive interconnect structures comprise a conformal layer that substantially follows the stepped profile.
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公开(公告)号：US11133642B2
公开(公告)日：2021-09-28
申请号：US16867334
申请日：2020-05-05
IPC分类号： H01S5/02208 , H01S5/02234 , H01S5/02345
摘要： A packaged electronic device structure includes a substrate having a major surface. A semiconductor device is connected to the major surface of the substrate, the semiconductor device having a first major surface, a second major surface opposite to the first major surface, and a side surface extending between the first major surface and the second major surface. A package body encapsulates a portion of the semiconductor device, wherein the side surface of the semiconductor device is exposed through a side surface of the package body. In some examples, the side surface of the semiconductor device is an active surface. In some examples, the package body comprises a molded structure that contacts and overlaps the first major surface of the semiconductor device.
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公开(公告)号：US11897761B2
公开(公告)日：2024-02-13
申请号：US17832904
申请日：2022-06-06
发明人： Ki Yeul Yang , Kyung Han Ryu , Seok Hun Yun , Bora Baloglu , Hyun Cho , Ramakanth Alapati
CPC分类号： B81C1/00182 , B81B7/007 , B81C1/00158 , B81C1/00301 , H01L23/481 , B81B2201/02
摘要： In one example, an electronic device includes a semiconductor sensor device having a cavity extending partially inward from one surface to provide a diaphragm adjacent an opposite surface. A barrier is disposed adjacent to the one surface and extends across the cavity, the barrier has membrane with a barrier body and first barrier strands bounded by the barrier body to define first through-holes. The electronic device further comprises one or more of a protrusion pattern disposed adjacent to the barrier structure, which can include a plurality of protrusion portions separated by a plurality of recess portions; one or more conformal membrane layers disposed over the first barrier strands; or second barrier strands disposed on and at least partially overlapping the first barrier strands. The second barrier strands define second through-holes laterally offset from the first through-holes. Other examples and related methods are also disclosed herein.
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