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公开(公告)号:US10970155B1
公开(公告)日:2021-04-06
申请号:US16366169
申请日:2019-03-27
Applicant: Amazon Technologies, Inc.
Inventor: Brian Robert Silver , Kun Xu
Abstract: System and method for performing a read transaction between a requester device, such as a host processor, and a completer device, such as a peripheral device. A device driver operating on the requester device receives a read request including a target address at which target data is to be read on the completer device. The length of the read request is increased from an initial length by an additional length for exchanging information with the completer device. The completer device generates and sends a read response comprising the target data and information about the target data. The length of the target data is equal to the initial length and the length of the information about the target data is less than or equal to the additional length. The device driver receives the read response and performs a resolution operation.
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公开(公告)号:US11704211B1
公开(公告)日:2023-07-18
申请号:US17643292
申请日:2021-12-08
Applicant: Amazon Technologies, Inc.
Inventor: Patricio Kaplan , Ron Diamant , Brian Robert Silver
CPC classification number: G06F11/2094 , G06F2201/82
Abstract: Techniques for avoiding uncorrectable errors in a memory device can include detecting a correctable error pattern of a memory page of a memory device, and determining that the correctable error pattern of the memory page satisfies a page migration condition. Upon satisfying the page migration condition, write accesses to the memory page are prevented from reaching a memory controller of the memory device. The contents of the memory page are then migrated to a reserved page, and a mapping table is updated to replace accesses to the memory page with accesses to the reserved page.
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公开(公告)号:US11620120B1
公开(公告)日:2023-04-04
申请号:US17448919
申请日:2021-09-27
Applicant: Amazon Technologies, Inc.
Inventor: Jonathan Paul Saunders , Brian Robert Silver , Thomas Sarvey
Abstract: Systems and methods are provided for configuration of a secondary processor by a host processor. The host processor can access compiled firmware for the secondary processor, which has a parameter stored at a pre-determined address. The host processor can modify the parameter at the pre-determined address in the firmware to generate a modified firmware for the secondary processor. The host processor can further load the modified firmware into a memory of the secondary processor. The secondary processor can execute the modified firmware having the modified parameter. The host processor can further remodify the parameter in the memory of the secondary processor during runtime without having to recompile the firmware.
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公开(公告)号:US10949321B1
公开(公告)日:2021-03-16
申请号:US16200620
申请日:2018-11-26
Applicant: Amazon Technologies, Inc.
Inventor: Thomas A. Volpe , Alwood Patrick Williams, III , Brian Robert Silver
IPC: G06F11/30 , G06F11/34 , G01R31/317 , G06F11/07
Abstract: Operational management of an integrated circuit device can be performed by a microcontroller based on information associated with the notification messages generated by the integrated circuit device. The notification messages may include timestamps and metadata for different notification types which can be used to build a timeline. The microcontroller may use the information to monitor the operational health and performance of the integrated circuit device or can communicate this information to a remote management server.
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公开(公告)号:US10860397B1
公开(公告)日:2020-12-08
申请号:US16297467
申请日:2019-03-08
Applicant: Amazon Technologies, Inc.
Inventor: Brian Robert Silver , Kun Xu , Alwood Patrick Williams , Thomas A. Volpe
Abstract: A computer system has a memory configured for sharing data between a first application and a second application. The memory includes a metadata region and a data region. The metadata region includes metadata that indicates how data being communicated between the first application and the second application is to be interpreted. The metadata also indicates whether the data can be found in the metadata itself or in a particular location in the data region. Each application can be assigned its own memory location containing a flag that can be set in order to indicate to the other application that the memory is ready to be accessed by the other application. The memory location can be implemented using a hardware register or in memory, either the same memory that includes the metadata and data regions or on a separate memory.
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