公开(公告)号：US09000802B2

公开(公告)日：2015-04-07

申请号：US14153625

申请日：2014-01-13

Applicant: Altera Corporation

Inventor： Michael Fitton ,  Kulwinder Dhanoa ,  Benjamin Thomas Cope ,  Kellie Marks ,  Lei Xu

IPC: H03K19/0175

CPC classification number: H03K19/017581 ,  G06F13/385

Abstract: Systems and methods are disclosed for interfacing between hard logic elements and soft logic elements implemented on an integrated device. In particular, a configurable interface is provided that includes interconnects between hard logic and soft logic, which enable signals to be selectively routed between the inputs and outputs of hard logic blocks and soft logic modules. The interconnects allow for certain hard logic blocks to be bypassed in favor of soft logic functionality. Moreover, the interconnects allow soft logic to augment the processing of hard logic blocks, e.g., by providing additional signals to the hard logic block.

Abstract translation: 公开了用于在集成设备上实现的硬逻辑元件和软逻辑元件之间的接口的系统和方法。 特别地，提供了包括硬逻辑和软逻辑之间的互连的可配置接口，其使信号能够在硬逻辑块和软逻辑模块的输入和输出之间选择性地路由。 互连允许绕过某些硬逻辑块以有利于软逻辑功能。 此外，互连允许软逻辑来增加硬逻辑块的处理，例如通过向硬逻辑块提供附加信号。

公开(公告)号：US20140125379A1

公开(公告)日：2014-05-08

申请号：US14153625

申请日：2014-01-13

Applicant: Altera Corporation

Inventor： Michael Fitton ,  Kulwinder Dhanoa ,  Benjamin Thomas Cope ,  Kellie Marks ,  Lei Xu

IPC: H03K19/0175

CPC classification number: H03K19/017581 ,  G06F13/385

Abstract: Systems and methods are disclosed for interfacing between hard logic elements and soft logic elements implemented on an integrated device. In particular, a configurable interface is provided that includes interconnects between hard logic and soft logic, which enable signals to be selectively routed between the inputs and outputs of hard logic blocks and soft logic modules. The interconnects allow for certain hard logic blocks to be bypassed in favor of soft logic functionality. Moreover, the interconnects allow soft logic to augment the processing of hard logic blocks, e.g., by providing additional signals to the hard logic block.

Abstract translation: 公开了用于在集成设备上实现的硬逻辑元件和软逻辑元件之间的接口的系统和方法。 特别地，提供了包括硬逻辑和软逻辑之间的互连的可配置接口，其使信号能够在硬逻辑块和软逻辑模块的输入和输出之间选择性地路由。 互连允许绕过某些硬逻辑块以有利于软逻辑功能。 此外，互连允许软逻辑来增加硬逻辑块的处理，例如通过向硬逻辑块提供附加信号。