Semiconductor package structure and method for manufacturing the same

    公开(公告)号:US11094649B2

    公开(公告)日:2021-08-17

    申请号:US16748559

    申请日:2020-01-21

    摘要: Present disclosure provides a semiconductor package structure, which includes a redistribution layer (RDL) structure, an electronic device, a first reinforcement structure, a second reinforcement structure, and an encapsulant. The RDL structure has a passivation layer and a patterned conductive layer disposed in the passivation layer. The electronic device is disposed on the RDL structure. The first reinforcement structure is disposed on the RDL structure and has a first modulus. The second reinforcement structure is disposed on the first reinforcement structure and has a second modulus substantially less than the first modulus. The encapsulant is disposed on the RDL structure and encapsulates the electronic device, the first reinforcement structure and the second reinforcement structure.

    Semiconductor package structure and method for manufacturing the same

    公开(公告)号:US11107791B2

    公开(公告)日:2021-08-31

    申请号:US16354156

    申请日:2019-03-14

    摘要: A semiconductor package structure includes a conductive structure, a first semiconductor chip, a second semiconductor chip, a first encapsulant and an upper semiconductor chip. The first semiconductor chip is electrically connected to the conductive structure. The first semiconductor chip includes at least one first conductive element disposed adjacent to a second surface thereof. The second semiconductor chip is electrically connected to the conductive structure and disposed next to the first semiconductor chip. The second semiconductor chip includes at least one second conductive element disposed adjacent to a second surface thereof. The first encapsulant is disposed on the conductive structure to cover the first semiconductor chip and the second semiconductor chip. The first conductive element and the second conductive element are exposed from the first encapsulant. The upper semiconductor chip is disposed on the first encapsulant and electrically connected to the first conductive element and the second conductive element.