公开(公告)号：US20220197647A1

公开(公告)日：2022-06-23

申请号：US17126977

申请日：2020-12-18

Applicant: Advanced Micro Devices, Inc.

Inventor： Onur Kayiran ,  Mohamed Assem Ibrahim ,  Shaizeen Aga

IPC: G06F9/30 ,  G06F12/06

Abstract: A memory module includes register selection logic to select alternate local source and/or destination registers to process PIM commands. The register selection logic uses an address-based register selection approach to select an alternate local source and/or destination register based upon address data specified by a PIM command and a split address maintained by a memory module. The register selection logic may alternatively use a register data-based approach to select an alternate local source and/or destination register based upon data stored in one or more local registers. A PIM-enabled memory module configured with the register selection logic described herein is capable of selecting an alternate local source and/or destination register to process PIM commands at or near the PIM execution unit where the PIM commands are executed.

公开(公告)号：US20200167328A1

公开(公告)日：2020-05-28

申请号：US16202082

申请日：2018-11-27

Applicant: Advanced Micro Devices, Inc.

Inventor： Mohamed Assem Ibrahim ,  Onur Kayiran ,  Yasuko Eckert

IPC: G06F16/22 ,  G06F16/901

Abstract: A portion of a graph dataset is generated for each computing node in a distributed computing system by, for each subject vertex in a graph, recording for the computing node an offset for the subject vertex, where the offset references a first position in an edge array for the computing node, and for each edge of a set of edges coupled with the subject vertex in the graph, calculating an edge value for the edge based on a connected vertex identifier identifying a vertex coupled with the subject vertex via the edge. When the edge value is assigned to the first position, the edge value is determined by a first calculation, and when the edge value is assigned to position subsequent to the first position, the edge value is determined by a second calculation. In the computing node, the edge value is recorded in the edge array.

公开(公告)号：US11966328B2

公开(公告)日：2024-04-23

申请号：US17126977

申请日：2020-12-18

Applicant: Advanced Micro Devices, Inc.

Inventor： Onur Kayiran ,  Mohamed Assem Ibrahim ,  Shaizeen Aga

IPC: G06F12/06

CPC classification number: G06F12/06 ,  G06F2212/1041

Abstract: A memory module includes register selection logic to select alternate local source and/or destination registers to process PIM commands. The register selection logic uses an address-based register selection approach to select an alternate local source and/or destination register based upon address data specified by a PIM command and a split address maintained by a memory module. The register selection logic may alternatively use a register data-based approach to select an alternate local source and/or destination register based upon data stored in one or more local registers. A PIM-enabled memory module configured with the register selection logic described herein is capable of selecting an alternate local source and/or destination register to process PIM commands at or near the PIM execution unit where the PIM commands are executed.

公开(公告)号：US11360891B2

公开(公告)日：2022-06-14

申请号：US16355168

申请日：2019-03-15

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Mohamed Assem Ibrahim ,  Onur Kayiran ,  Yasuko Eckert ,  Gabriel H. Loh

IPC: G06F12/0802 ,  G06F12/084 ,  G06F12/0846

Abstract: A method of dynamic cache configuration includes determining, for a first clustering configuration, whether a current cache miss rate exceeds a miss rate threshold. The first clustering configuration includes a plurality of graphics processing unit (GPU) compute units clustered into a first plurality of compute unit clusters. The method further includes clustering, based on the current cache miss rate exceeding the miss rate threshold, the plurality of GPU compute units into a second clustering configuration having a second plurality of compute unit clusters fewer than the first plurality of compute unit clusters.

公开(公告)号：US11068458B2

公开(公告)日：2021-07-20

申请号：US16202082

申请日：2018-11-27

Applicant: Advanced Micro Devices, Inc.

Inventor： Mohamed Assem Ibrahim ,  Onur Kayiran ,  Yasuko Eckert

IPC: G06F16/22 ,  G06F16/901

Abstract: A portion of a graph dataset is generated for each computing node in a distributed computing system by, for each subject vertex in a graph, recording for the computing node an offset for the subject vertex, where the offset references a first position in an edge array for the computing node, and for each edge of a set of edges coupled with the subject vertex in the graph, calculating an edge value for the edge based on a connected vertex identifier identifying a vertex coupled with the subject vertex via the edge. When the edge value is assigned to the first position, the edge value is determined by a first calculation, and when the edge value is assigned to position subsequent to the first position, the edge value is determined by a second calculation. In the computing node, the edge value is recorded in the edge array.

公开(公告)号：US10938709B2

公开(公告)日：2021-03-02

申请号：US16224739

申请日：2018-12-18

Applicant: Advanced Micro Devices, Inc.

Inventor： Mohamed Assem Ibrahim ,  Onur Kayiran ,  Yasuko Eckert ,  Jieming Yin

IPC: H04L12/761 ,  H04L12/781 ,  H04L12/715 ,  H04L12/931 ,  H04L12/729 ,  H04L12/733

Abstract: A method includes receiving, from an origin computing node, a first communication addressed to multiple destination computing nodes in a processor interconnect fabric, measuring a first set of one or more communication metrics associated with a transmission path to one or more of the multiple destination computing nodes, and for each of the destination computing nodes, based on the set of communication metrics, selecting between a multicast transmission mode and unicast transmission mode as a transmission mode for transmitting the first communication to the destination computing node.