公开(公告)号：US20240394454A1

公开(公告)日：2024-11-28

申请号：US18695261

申请日：2022-10-04

Applicant: ASML NETHERLANDS B.V.

Inventor： Tsung-Pao FANG ,  Wei-Chou LIN ,  Hao LIN ,  Chao SONG

IPC: G06F30/392

Abstract: A method for grouping patterns associated with one or more design layouts of a semiconductor. The method involves obtaining a set of patterns (e.g., from one or more design layouts), where a pattern of the set of patterns includes a non-intersected feature portion (e.g., parallel bars) within a bounding box of the pattern. A non-intersected feature portion of a pattern is encoded to a pattern representation having elements, where each element has a first component indicating a type of an individual non-intersected feature portion, and a second component indicating a width of the individual non-intersected feature portion projected along a designated edge of an area enclosing the pattern. The set of patterns are grouped into one or more groups by comparing the pattern representations associated with the set of patterns.