公开(公告)号：US09270500B1

公开(公告)日：2016-02-23

申请号：US14106485

申请日：2013-12-13

Applicant: ALTERA CORPORATION

Inventor： Divya Vijayaraghavan ,  Gopi Krishnamurthy ,  Ning Xue ,  Chong H. Lee

IPC: H04L25/03

CPC classification number: H04L25/03885 ,  H04B3/04 ,  H04B3/32 ,  H04L25/03343

Abstract: One embodiment relates to an integrated circuit configured to perform dynamic transmit equalization of a bi-directional lane. The integrated circuit including an interface between the physical coding and media access control circuitry, and an equalization control circuit which is external to the physical coding circuitry and which is configured to perform the dynamic transmit equalization using said interface. Another embodiment relates to a transceiver circuit which includes physical coding circuitry and media access control circuitry. The transceiver circuit further includes an interface between the physical coding circuitry and the media access control circuitry and an equalization controller which is external to the physical coding circuitry and which is configured to perform dynamic transmit equalization using said interface. The interface is configured to provide transmit coefficient data in a time-multiplexed signal format from the media access control circuitry to the physical coding circuitry. Other embodiments, aspects, and features are also disclosed.

Abstract translation: 一个实施例涉及被配置为执行双向通道的动态发送均衡的集成电路。 该集成电路包括物理编码和媒体访问控制电路之间的接口，以及在物理编码电路外部的配置成使用所述接口执行动态发送均衡的均衡控制电路。 另一个实施例涉及一种包括物理编码电路和媒体访问控制电路的收发器电路。 收发器电路还包括物理编码电路和媒体访问控制电路之间的接口以及在物理编码电路之外的均衡控制器，并且被配置为使用所述接口执行动态发送均衡。 接口被配置为以时间复用的信号格式提供从媒体访问控制电路到物理编码电路的传输系数数据。 还公开了其它实施例，方面和特征。