Light volume rendering
    3.
    发明授权

    公开(公告)号:US11551398B2

    公开(公告)日:2023-01-10

    申请号:US17008388

    申请日:2020-08-31

    Abstract: Systems, apparatuses, and methods for implementing light volume rendering techniques are disclosed. A processor is coupled to a memory. A processor renders the geometry of a scene into a geometry buffer. For a given light source in the scene, the processor initiates two shader pipeline passes to determine which pixels in the geometry buffer to light. On the first pass, the processor renders a front-side of a light volume corresponding to the light source. Any pixels of the geometry buffer which are in front of the front-side of the light volume are marked as pixels to be discarded. Then, during the second pass, only those pixels which were not marked to be discarded are sent to the pixel shader. This approach helps to reduce the overhead involved in applying a lighting effect to the scene by reducing the amount of work performed by the pixel shader.

    Single pass flexible screen/scale rasterization

    公开(公告)号:US10546365B2

    公开(公告)日:2020-01-28

    申请号:US15843968

    申请日:2017-12-15

    Abstract: An apparatus, such as a head mounted device (HMD), includes one or more processors configured to implement a graphics pipeline that renders pixels in window space with a nonuniform pixel spacing. The apparatus also includes a first distortion function that maps the non-uniformly spaced pixels in window space to uniformly spaced pixels in raster space. The apparatus further includes a scan converter configured to sample the pixels in window space through the first distortion function. The scan converter is configured to render display pixels used to generate an image for display to a user based on the uniformly spaced pixels in raster space. In some cases, the pixels in the window space are rendered such that a pixel density per subtended area is constant across the user's field of view.

    Cache blocking for dispatches
    8.
    发明授权

    公开(公告)号:US12189534B2

    公开(公告)日:2025-01-07

    申请号:US17564474

    申请日:2021-12-29

    Abstract: A processing system divides successive dispatches of work items into portions. The successive dispatches are separated from each other by barriers, each barrier indicating that the work items of the previous dispatch must complete execution before work items of a subsequent dispatch can begin execution. In some embodiments, the processing system interleaves execution of portions of a first dispatch with portions of subsequent dispatches that consume data produced by the first dispatch. The processing system thereby reduces the amount of data written to the local cache by a producer dispatch while preserving data locality for a subsequent consumer (or consumer/producer) dispatch and facilitating processing efficiency.

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