摘要:
A parallel interpolation A/D converter includes a reference voltage generation circuit configured to generate (m+1) different reference voltages VR1-VRm+1, where m is a positive integer, and VR1
摘要:
A signal processing device, even when a steep difference in DC level is included in a signal read from a disc such as a DVD-RAM format, cuts off the DC level and pulls the read signal into an appropriate A/D input level. A steep difference in DC level between a data section and a CAPA section is absorbed by a first offset unit, and an asymmetry which occurs due to variations in the disc manufacturing stage is corrected by a second offset unit. Further, a control signal for operating the two offset units exclusively is generated by a controller, thereby controlling both offset units.
摘要:
An information reproduction device according to the present invention is a device for accessing a recording medium having first address information and second address information recorded thereon. The first address information is represented by a shape formed on the recording medium in advance; and the second address information is recorded on the recording medium together with data. The information reproduction device includes a head section for accessing the recording medium to generate a reproduction signal; a first detection section for detecting the first address information from the reproduction signal; a second detection section for detecting the second address information from the reproduction signal; and a control section for, based on a detection result of either the first detection section or the second detection section which detected the address information first, controlling an access after the detection to the recording medium.
摘要:
It is an object of the present invention to provide a signal processing device which, even when a steep difference in DC level is included in a signal read from a disc such as a DVD-RAM format, cuts off the DC level and pulls the read signal into an appropriate A/D input level with an attempt to cost reduction. A steep difference in DC level between a data section and a CAPA section is absorbed by a first offset unit 1, and an asymmetry which occurs due to variations in the disc manufacturing stage is corrected by a second offset unit 2. Further, a control signal for operating the two offset units exclusively is generated by a controller 7, thereby to control the both offset units.
摘要:
A waveform equalization control device includes a waveform equalizer that has a filter provided with a plurality of taps, updates the tap coefficient of each of the plurality of taps in accordance with a tap coefficient signal inputted thereto, causes the plurality of taps to respectively receive a plurality of values sampled at different time points from an input signal, performs waveform equalization with respect to the input signal, and outputs the signal after the waveform equalization, an equalization target value generation unit for determining an equalization target value, an error estimation unit for obtaining the error between the equalization target value and the signal after the waveform equalization, and a coefficient update unit for determining an amount of updating the coefficient of each of the taps of the filter of the waveform equalizer based on the error signal and on the input value to each of the taps and outputting the amount of updating the tap coefficient as the tap coefficient signal. The equalization target value generation unit obtains sign signals each showing whether the signal after the waveform equalization has a positive value or a negative value for first to fifth time points and determines a value corresponding to a total sum which is a sum of respective results of multiplying the sign signals for the first to fifth time points by θ, β, α, β, and θ (where each of α, β, and θ is a predetermined real number) as the equalization target value.
摘要:
The present invention is made to improve the conventional analog processing that is easily affected by variations in semiconductor processing. This invention provides a wobble signal processing apparatus that can reduce the circuit scale and the power consumption as well as improve the quality of signal processing. The wobble signal processing apparatus of the present invention digitally processes a part that has conventionally been processed by an analog system, and a PRML circuit is further provided to implement error detection, whereby the circuit scale and the power consumption is reduced. This improves the detection of a signal that is inputted to the wobble signal processing apparatus.
摘要:
A data demodulation process rate is varied according to a reproduction state, thereby reducing power consumption while maintaining a reading performance in a favorable state. A channel rate process data demodulation device performs a data demodulation process by employing channel bit frequency. Further, a half rate process data demodulation device performs a data demodulation process by employing frequency half as high as the channel bit frequency. These devices demodulate digital data from an optical recording medium. A process rate switching device switches a process rate at data demodulation, whereby demodulation is performed by switching between the data demodulation devices according to a quality of a reproduction signal, so as to reproduce the digital data recorded on the optical recording medium.
摘要:
An optical disc recording/playback apparatus is provided with a first AD converter 35 for shaping a push-pull signal 14 detected from an optical disc medium 1 by a light difference signal shaping circuit 21, and converting the signal into a digital sampling signal 38 using a sampling clock 37 synchronized with a channel frequency; a series of means for detecting wobble amplitude information 77 during recording from the digital sampling signal 38; a series of means for detecting address polarity information 60 and address position information during playback; and a recording laser power control circuit 113 for controlling a recording laser power to a power suited for recording on the basis of the wobble amplitude information.
摘要:
In a digital recorded data reproduction which applies PRML signal processing, it is an object to enhance a reproduction signal quality and a playability for an abnormal signal by an offset correction and a phase-interpolation-type digital phase-locked loop. A prescribed frequency band of a reproduction signal is emphasized by a waveform equalizing unit 2, and its output signal is sampled by an asynchronous clock at an analog/digital converter 3. After a sampling signal is subjected to the offset correction, PR equalization is performed by a transversal filter 6 and a tap weighting factor control unit 8 which applies LMS algorithm, and a signal of a regular sampling phase is reproduced from its output signal by a high-order interpolation filter 7 employing a digital phase-locked loop 11. The reproduced signal in a regular phase is demodulated by a maximum likelihood decoder 12, thereby to reproduce digital data recorded on a medium.
摘要:
A digital signal reproducing apparatus includes an analog to digital converter for sampling and quantizing a signal read from an optical recording medium in accordance with a reproduced clock having a frequency which is one-half of a channel bit frequency and outputting an obtained digital RF signal, an offset compensation circuit for reducing an offset component in an amplitude direction from the digital RF signal, and a simplified interpolation filter for reconstructing a signal indicating a predetermined pattern recorded in the optical recording medium from the output signal of the offset compensation circuit and outputting the reconstructed signal. A control operation is performed to reduce the magnitudes of respective values shown by first phase error information on a section with the predetermined pattern and by second phase error information on a section other than the section with the predetermined pattern.