公开(公告)号：US5341049A

公开(公告)日：1994-08-23

申请号：US916430

申请日：1992-07-21

Applicant: Atsushi Shimizu ,  Satoru Isomura ,  Takeo Yamada ,  Tohru Kobayashi ,  Yoshuhiro Fujimura ,  Yuko Ito

Inventor： Atsushi Shimizu ,  Satoru Isomura ,  Takeo Yamada ,  Tohru Kobayashi ,  Yoshuhiro Fujimura ,  Yuko Ito

IPC: H01L21/82 ,  H01L21/822 ,  H01L27/04 ,  H01L27/118 ,  H03K19/173 ,  H03K19/177

CPC classification number: H03K19/1735 ,  H01L27/118 ,  H01L2224/11

Abstract: A semiconductor IC device has an input/output circuit and an internal logic circuit connected with the input/output circuit formed in a main surface of a semiconductor substrate of a generally rectangular shape. The input/output circuit is divided into at least two input/output circuit blocks in such a manner that edges of the logic circuit blocks defined by the division on the main surface of the substrate extend in a direction substantially parallel with a pair of opposite sides of the substrate. The internal logic circuit is divided into at least three logic circuit blocks in such a manner that edges of the logic circuit blocks defined by the division on the main surface of the substrate extend in the above-mentioned direction. Each of the input/output circuit blocks is sandwiched by and electrically connected with adjacently arranged two of the logic circuit blocks.

Abstract translation: 半导体IC器件具有与形成在大致矩形形状的半导体衬底的主表面中的输入/输出电路连接的输入/输出电路和内部逻辑电路。 输入/输出电路被划分为至少两个输入/输出电路块，使得由基板的主表面上的划分限定的逻辑电路块的边缘沿着与一对相对侧基本平行的方向延伸 的基底。 内部逻辑电路被分成至少三个逻辑电路块，使得由衬底的主表面上的划分限定的逻辑电路块的边缘沿上述方向延伸。 每个输入/输出电路块被夹在相邻布置的两个逻辑电路块中并与其电连接。