公开(公告)号：US08378737B2

公开(公告)日：2013-02-19

申请号：US13417016

申请日：2012-03-09

Applicant: Ming-Dou Ker ,  Yi-Hsin Weng

Inventor： Ming-Dou Ker ,  Yi-Hsin Weng

IPC: G05F1/10

CPC classification number: H02M3/073 ,  G11C5/145 ,  H02M2003/075 ,  H02M2003/077

Abstract: A charge pump circuit includes at least one stage between an input end and an output end. The at least one stage includes a first CMOS transistor coupled with a first capacitor and a second CMOS transistor coupled with a second capacitor. The at least one stage is capable of receiving a first timing signal and a second timing signal for pumping an input voltage at the input end to an output voltage at the output end. During a transitional period of the first timing signal and the second timing signal, the at least one stage is capable of substantially turning off at least one of the first CMOS transistor and the second CMOS transistor for substantially reducing leakage currents flowing through at least one of the first CMOS transistor and the second CMOS transistor.

Abstract translation: 电荷泵电路包括在输入端和输出端之间的至少一个级。 所述至少一个级包括与第一电容器耦合的第一CMOS晶体管和与第二电容器耦合的第二CMOS晶体管。 所述至少一个级能够接收第一定时信号和第二定时信号，用于将输入端的输入电压泵送到输出端的输出电压。 在第一定时信号和第二定时信号的过渡时段期间，至少一个级能够基本上关闭第一CMOS晶体管和第二CMOS晶体管中的至少一个，用于基本上减少流过至少一个 第一CMOS晶体管和第二CMOS晶体管。

公开(公告)号：US20120169409A1

公开(公告)日：2012-07-05

申请号：US13417016

申请日：2012-03-09

Applicant: Ming-Dou KER ,  Yi-Hsin WENG

Inventor： Ming-Dou KER ,  Yi-Hsin WENG

IPC: G05F3/02

CPC classification number: H02M3/073 ,  G11C5/145 ,  H02M2003/075 ,  H02M2003/077

Abstract: A charge pump circuit includes at least one stage between an input end and an output end. The at least one stage includes a first CMOS transistor coupled with a first capacitor and a second CMOS transistor coupled with a second capacitor. The at least one stage is capable of receiving a first timing signal and a second timing signal for pumping an input voltage at the input end to an output voltage at the output end. During a transitional period of the first timing signal and the second timing signal, the at least one stage is capable of substantially turning off at least one of the first CMOS transistor and the second CMOS transistor for substantially reducing leakage currents flowing through at least one of the first CMOS transistor and the second CMOS transistor.

Abstract translation: 电荷泵电路包括在输入端和输出端之间的至少一个级。 所述至少一个级包括与第一电容器耦合的第一CMOS晶体管和与第二电容器耦合的第二CMOS晶体管。 所述至少一个级能够接收第一定时信号和第二定时信号，用于将输入端的输入电压泵送到输出端的输出电压。 在第一定时信号和第二定时信号的过渡时段期间，至少一个级能够基本上关闭第一CMOS晶体管和第二CMOS晶体管中的至少一个，用于基本上减少流过至少一个 第一CMOS晶体管和第二CMOS晶体管。

公开(公告)号：US09031292B2

公开(公告)日：2015-05-12

申请号：US13450939

申请日：2012-04-19

Applicant: Jiun-Jie Wang ,  Wey-Yil Lin ,  Chin-Song Lu ,  Yi-Hsin Weng ,  Ren-Hsiang Hsieh ,  Shu-Hang Ng ,  Yau-Yau Wai ,  Yung-Liang Wan

Inventor： Jiun-Jie Wang ,  Wey-Yil Lin ,  Chin-Song Lu ,  Yi-Hsin Weng ,  Ren-Hsiang Hsieh ,  Shu-Hang Ng ,  Yau-Yau Wai ,  Yung-Liang Wan

IPC: G06K9/00 ,  A61B5/00 ,  A61B5/055 ,  G06T7/00 ,  G01R33/563

CPC classification number: A61B5/4082 ,  A61B5/055 ,  G01R33/56341 ,  G06T7/0012 ,  G06T2207/10016 ,  G06T2207/10092 ,  G06T2207/30016

Abstract: The invention relates to the use of diffusion kurtosis imaging (DKI) in the diagnosis of Parkinson Disease related neurodegenerative disorders, including (but not limited to) Parkinson's disease (PD) and Parkinson plus syndromes.

Abstract translation: 本发明涉及扩散峰度成像（DKI）在帕金森病相关神经变性疾病诊断中的应用，包括（但不限于）帕金森病（PD）和帕金森综合征。

公开(公告)号：US20130279771A1

公开(公告)日：2013-10-24

申请号：US13450939

申请日：2012-04-19

Applicant: JIUN-JIE WANG ,  WEY-YIL LIN ,  CHIN-SONG LU ,  YI-HSIN WENG ,  REN-HSIANG HSIEH ,  SHU-HANG NG ,  YAU-YAU WAI ,  YUNG-LIANG WAN

Inventor： JIUN-JIE WANG ,  WEY-YIL LIN ,  CHIN-SONG LU ,  YI-HSIN WENG ,  REN-HSIANG HSIEH ,  SHU-HANG NG ,  YAU-YAU WAI ,  YUNG-LIANG WAN

IPC: G06K9/36

CPC classification number: A61B5/4082 ,  A61B5/055 ,  G01R33/56341 ,  G06T7/0012 ,  G06T2207/10016 ,  G06T2207/10092 ,  G06T2207/30016

Abstract: The invention relates to the use of diffusion kurtosis imaging (DKI) in the diagnosis of Parkinson Disease related neurodegenerative disorders, including (but not limited to) Parkinson's disease (PD) and Parkinson plus syndromes.

Abstract translation: 本发明涉及扩散峰度成像（DKI）在帕金森病相关神经变性疾病诊断中的应用，包括（但不限于）帕金森病（PD）和帕金森综合征。

公开(公告)号：US20100253418A1

公开(公告)日：2010-10-07

申请号：US12751182

申请日：2010-03-31

Applicant: Ming-Dou KER ,  Yi-Hsin WENG

Inventor： Ming-Dou KER ,  Yi-Hsin WENG

IPC: G05F3/02

CPC classification number: H02M3/073 ,  G11C5/145 ,  H02M2003/075 ,  H02M2003/077

Abstract: A charge pump circuit includes at least one stage between an input end and an output end. The at least one stage includes a first CMOS transistor coupled with a first capacitor and a second CMOS transistor coupled with a second capacitor. The at least one stage is capable of receiving a first timing signal and a second timing signal for pumping an input voltage at the input end to an output voltage at the output end. During a transitional period of the first timing signal and the second timing signal, the at least one stage is capable of substantially turning off at least one of the first CMOS transistor and the second CMOS transistor for substantially reducing leakage currents flowing through at least one of the first CMOS transistor and the second CMOS transistor.

Abstract translation: 电荷泵电路包括在输入端和输出端之间的至少一个级。 所述至少一个级包括与第一电容器耦合的第一CMOS晶体管和与第二电容器耦合的第二CMOS晶体管。 所述至少一个级能够接收第一定时信号和第二定时信号，用于将输入端的输入电压泵送到输出端的输出电压。 在第一定时信号和第二定时信号的过渡时段期间，至少一个级能够基本上关闭第一CMOS晶体管和第二CMOS晶体管中的至少一个，用于基本上减少流过至少一个 第一CMOS晶体管和第二CMOS晶体管。

公开(公告)号：US08154333B2

公开(公告)日：2012-04-10

申请号：US12751182

申请日：2010-03-31

Applicant: Ming-Dou Ker ,  Yi-Hsin Weng

Inventor： Ming-Dou Ker ,  Yi-Hsin Weng

IPC: G05F1/10

CPC classification number: H02M3/073 ,  G11C5/145 ,  H02M2003/075 ,  H02M2003/077

Abstract: A charge pump circuit includes at least one stage between an input end and an output end. The at least one stage includes a first CMOS transistor coupled with a first capacitor and a second CMOS transistor coupled with a second capacitor. The at least one stage is capable of receiving a first timing signal and a second timing signal for pumping an input voltage at the input end to an output voltage at the output end. During a transitional period of the first timing signal and the second timing signal, the at least one stage is capable of substantially turning off at least one of the first CMOS transistor and the second CMOS transistor for substantially reducing leakage currents flowing through at least one of the first CMOS transistor and the second CMOS transistor.

Abstract translation: 电荷泵电路包括在输入端和输出端之间的至少一个级。 所述至少一个级包括与第一电容器耦合的第一CMOS晶体管和与第二电容器耦合的第二CMOS晶体管。 所述至少一个级能够接收第一定时信号和第二定时信号，用于将输入端的输入电压泵送到输出端的输出电压。 在第一定时信号和第二定时信号的过渡时段期间，至少一个级能够基本上关闭第一CMOS晶体管和第二CMOS晶体管中的至少一个，用于基本上减少流过至少一个 第一CMOS晶体管和第二CMOS晶体管。