公开(公告)号：US08780951B2

公开(公告)日：2014-07-15

申请号：US12622192

申请日：2009-11-19

Applicant: Jin Dong Song ,  Won Jun Choi ,  Jung Il Lee

Inventor： Jin Dong Song ,  Won Jun Choi ,  Jung Il Lee

IPC: H01S3/08

CPC classification number: H01S5/183 ,  H01L33/105 ,  H01S2304/00 ,  H01S2304/02

Abstract: There is provided a distributed Bragg's reflector (DBR) comprising a substrate and an unit distributed Bragg's reflector (DBR) layer, wherein a multi-layer is laminated on the substrate. The unit DBR layer is composed of a multi-layer laminated structure of unit digital-alloy multinary compound semiconductor layer/multinary compound semiconductor layer or unit digital-alloy multinary compound semiconductor layer/unit digital-alloy multinary compound semiconductor layer. The unit digital-alloy multinary compound semiconductor layer is composed of the multi-layer laminated structure of the first layer of multinary compound semiconductor and the second layer of a different multinary compound semiconductor on said first layer. The digital-alloy distributed Bragg's reflector of the present invention has a uniform quality on the substance area and the filter and reflector having uniformly high quality can be mass produced by using the reflector.

Abstract translation: 提供了一种分布式布拉格反射器（DBR），其包括基板和单元分布布拉格反射器（DBR）层，其中多层层压在基板上。 单元DBR层由单元数字合金多元化合物半导体层/多元化合物半导体层或单元数字合金多元化合物半导体层/单元数字合金多元化合物半导体层的多层层叠结构组成。 单元数字合金多元化合物半导体层由第一层多元化合物半导体的多层层叠结构和在第一层上的不同的多元化合物半导体的第二层组成。 本发明的数字合金分布布拉格反射体在物质面积上具有均匀的质量，并且可以通过使用反射体大量生产具有均匀高质量的过滤器和反射器。

公开(公告)号：US08296994B2

公开(公告)日：2012-10-30

申请号：US12962724

申请日：2010-12-08

Applicant: Seong-Il Kim ,  Won-Jun Choi ,  Il-Ki Han ,  Jung-Il Lee

Inventor： Seong-Il Kim ,  Won-Jun Choi ,  Il-Ki Han ,  Jung-Il Lee

IPC: A01G9/24

CPC classification number: A01G9/243 ,  A01G9/1438 ,  F24S23/31 ,  G02B5/045 ,  Y02A40/252 ,  Y02A40/266 ,  Y02E10/43 ,  Y02P60/124

Abstract: A film sheet for area-focusing of sunlight and a greenhouse provided with the same are provided. A film sheet includes i) a film having a rectangular shape, and ii) a plurality of prism assemblies formed on one surface of the film to extend in one direction. At least one prism assembly of the plurality of prism assemblies includes i) at least one first prism unit including a plurality of first prisms with slanted angles that are substantially the same as each other, and ii) at least one second prism unit neighboring the first prism unit and including a plurality of second prisms with slanted angles that are substantially the same as each other. The width of the first prism unit is substantially the same as the width of the second prism unit and a slanted angle of one first prism among the plurality of first prisms is different from a slanted angle of one second prism among the plurality of second prisms, and light entering the prism assembly is configured to be area-focused.

Abstract translation: 提供了一种用于阳光区域聚焦的薄膜片和设有该阳光的温室。 膜片包括i）具有矩形形状的膜，以及ii）形成在膜的一个表面上以在一个方向上延伸的多个棱镜组件。 所述多个棱镜组件中的至少一个棱镜组件包括：i）至少一个第一棱镜单元，其包括具有彼此基本相同的倾斜角度的多个第一棱镜，以及ii）与第一棱镜单元相邻的至少一个第二棱镜单元 棱镜单元，并且包括具有彼此基本相同的倾斜角度的多个第二棱镜。 第一棱镜单元的宽度与第二棱镜单元的宽度基本相同，并且多个第一棱镜中的一个第一棱镜的倾斜角度与多个第二棱镜中的一个第二棱镜的倾斜角度不同， 并且进入棱镜组件的光被配置为区域聚焦。

公开(公告)号：US08248878B2

公开(公告)日：2012-08-21

申请号：US12633900

申请日：2009-12-09

Applicant: Won Jun Choi

Inventor： Won Jun Choi

IPC: G11C7/00

CPC classification number: G11C11/406 ,  G11C11/40615 ,  G11C2211/4065 ,  G11C2211/4067

Abstract: Circuits for generating refresh period signals and semiconductor integrated circuits using the same are presented. The refresh period signal generation circuit can include an oscillator, a pulse generation unit, and a signal controller. The oscillator is configured to generate an oscillation signal in response to a refresh duration correction signal. The pulse generation unit is configured to generate a refresh period signal in response to the oscillation signal. The signal controller configured to generate the refresh duration correction signal, which corrects an active time of a refresh duration signal, in response to the oscillation signal.

Abstract translation: 提出了用于产生刷新周期信号的电路和使用其的半导体集成电路。 刷新周期信号发生电路可以包括振荡器，脉冲发生单元和信号控制器。 振荡器被配置为响应于刷新持续时间校正信号产生振荡信号。 脉冲发生单元被配置为响应于振荡信号产生刷新周期信号。 所述信号控制器被配置为响应于所述振荡信号产生刷新持续时间校正信号，所述刷新持续时间校正信号校正刷新持续时间信号的有效时间。

公开(公告)号：US08040952B2

公开(公告)日：2011-10-18

申请号：US11392817

申请日：2006-03-30

Applicant: Gwang-Hoon Park ,  Won-jun Choi

Inventor： Gwang-Hoon Park ,  Won-jun Choi

IPC: H04N11/02

CPC classification number: H04N21/2365 ,  H04N19/13 ,  H04N19/31 ,  H04N19/36 ,  H04N19/597 ,  H04N19/61 ,  H04N19/615 ,  H04N19/635 ,  H04N21/21805 ,  H04N21/2662 ,  H04N21/4347 ,  H04N21/631

Abstract: Scalable multi-view image encoding and decoding methods and apparatuses are provided. The scalable multi-view image encoding and decoding methods and apparatuses filter multi-view images input from a plurality of cameras in spatial-axis and in temporal-axis directions using motion compensated temporal filtering (MCTF) or hierarchical B-pictures and scalably code the filtered multi-view.

Abstract translation: 提供了可扩展的多视图图像编码和解码方法和装置。 可扩展的多视图图像编码和解码方法和装置使用运动补偿时间滤波（MCTF）或分层B图像在空间轴和时间轴方向上从多个摄像机输入的多视图图像并且可缩放地编码 过滤多视图。

公开(公告)号：US20090257300A1

公开(公告)日：2009-10-15

申请号：US12347228

申请日：2008-12-31

Applicant: Won Jun Choi ,  Jeong Woo Lee ,  Hyung Wook Moon

Inventor： Won Jun Choi ,  Jeong Woo Lee ,  Hyung Wook Moon

IPC: G11C7/00 ,  G11C29/00

CPC classification number: G11C17/18 ,  G11C29/80

Abstract: A fuse information control device having a delay circuit to delay an active signal, includes a fuse circuit that outputs fuse information in response to a fuse information control signal, and a fuse information control signal generating unit that generates the fuse information control signal in response to one of the active signal and internal delay signals of the delay circuit.

Abstract translation: 一种具有延迟有源信号的延迟电路的熔丝信息控制装置，包括响应熔丝信息控制信号输出熔丝信息的熔丝电路，以及响应于熔丝信息控制信号生成熔丝信息控制信号的熔丝信息控制信号产生单元 延迟电路的有效信号和内部延迟信号之一。

公开(公告)号：US07350370B2

公开(公告)日：2008-04-01

申请号：US11151257

申请日：2005-06-14

Applicant: Sung Kwan Park ,  Jeong Weon Ju ,  Won Jun Choi ,  Kyo Ha Keum

Inventor： Sung Kwan Park ,  Jeong Weon Ju ,  Won Jun Choi ,  Kyo Ha Keum

IPC: F25D23/12

CPC classification number: F24F1/0007 ,  F24F13/28 ,  F24F2001/0048 ,  Y10S55/31

Abstract: An indoor unit of an air conditioner is provided. The indoor unit includes a main chassis, a front frame, a heat exchanger and a fan, a front panel, a filter, and a filter frame. The main chassis constitutes a rear appearance. The front frame is formed on the front of the main chassis to constitute a front appearance. The heat exchanger and the fan are disposed in the inside of the main chassis. The front panel shields the front side of the front frame. The filter is formed at the back of the front panel to filter foreign substance. The filter frame is integrally formed with the front frame to fix the filter.

Abstract translation: 提供一种空调的室内机。 室内机包括主底盘，前框架，热交换器和风扇，前面板，过滤器和过滤器框架。 主底盘构成后部外观。 前框架形成在主机箱的前部，构成前部外观。 热交换器和风扇设置在主机箱的内部。 前面板屏蔽前框架的前侧。 过滤器形成在前面板的后面以过滤异物。 过滤器框架与前框架一体地形成以固定过滤器。

公开(公告)号：US20100296356A1

公开(公告)日：2010-11-25

申请号：US12633900

申请日：2009-12-09

Applicant: Won Jun CHOI

Inventor： Won Jun CHOI

IPC: G11C7/00

CPC classification number: G11C11/406 ,  G11C11/40615 ,  G11C2211/4065 ,  G11C2211/4067

Abstract: Circuits for generating refresh period signals and semiconductor integrated circuits using the same are presented. The refresh period signal generation circuit can include an oscillator, a pulse generation unit, and a signal controller. The oscillator is configured to generate an oscillation signal in response to a refresh duration correction signal. The pulse generation unit is configured to generate a refresh period signal in response to the oscillation signal. The signal controller configured to generate the refresh duration correction signal, which corrects an active time of a refresh duration signal, in response to the oscillation signal.

Abstract translation: 提出了用于产生刷新周期信号的电路和使用其的半导体集成电路。 刷新周期信号发生电路可以包括振荡器，脉冲发生单元和信号控制器。 振荡器被配置为响应于刷新持续时间校正信号产生振荡信号。 脉冲发生单元被配置为响应于振荡信号产生刷新周期信号。 所述信号控制器被配置为响应于所述振荡信号产生刷新持续时间校正信号，所述刷新持续时间校正信号校正刷新持续时间信号的有效时间。

公开(公告)号：US07816699B2

公开(公告)日：2010-10-19

申请号：US12018280

申请日：2008-01-23

Applicant: Q-Han Park ,  Won-Jun Choi ,  Heon-Su Jeon

Inventor： Q-Han Park ,  Won-Jun Choi ,  Heon-Su Jeon

IPC: H01L33/00

CPC classification number: H01L33/10 ,  H01L33/22

Abstract: Disclosed is a polarized light emitting diode (LED) capable of emitting polarized light in the front direction thereof by forming a first grating layer on a quantum well layer and forming a second grating layer on a substrate. The polarized LED includes a nitride thin film formed on a substrate, a quantum well layer formed on the nitride thin film, a first grating layer formed on the quantum well layer to allow a part of light generated from the quantum well layer to pass through the first grating layer and to reflect remaining light, and a second grating layer formed on the substrate to rotate the light reflected from the first grating layer such that the reflected light passes through the first grating layer.

Abstract translation: 公开了一种能够通过在量子阱层上形成第一光栅层并在基板上形成第二光栅层而能够在其前方向上发射偏振光的偏振发光二极管（LED）。 偏光LED包括形成在衬底上的氮化物薄膜，形成在氮化物薄膜上的量子阱层，形成在量子阱层上的第一光栅层，以允许从量子阱层产生的一部分光通过 第一光栅层并反射剩余的光，以及形成在基板上的第二光栅层，以旋转从第一光栅层反射的光，使得反射光穿过第一光栅层。

公开(公告)号：US20100091602A1

公开(公告)日：2010-04-15

申请号：US12345199

申请日：2008-12-29

Applicant: Sang Hoon SHIN ,  Won Jun CHOI

Inventor： Sang Hoon SHIN ,  Won Jun CHOI

IPC: G11C8/00

CPC classification number: G11C29/20 ,  G11C8/04

Abstract: An address counting circuit includes a counter configured to sequentially count from an initial address in response to a clock signal in order to output counted addresses. The address counting circuit also includes a code conversion unit that is configured to output converted addresses such that only one address bit of the converted addresses with respect to the previous converted addresses are toggled to output the converted addresses. The converted addresses output form the code conversion unit do not overlap with one another.

Abstract translation: 地址计数电路包括被配置为响应于时钟信号从初始地址顺序计数以计数地址的计数器。 地址计数电路还包括代码转换单元，其被配置为输出转换的地址，使得相对于先前转换的地址仅转换地址的一个地址位被切换以输出转换的地址。 从代码转换单元输出的转换地址不会彼此重叠。

公开(公告)号：US20100091599A1

公开(公告)日：2010-04-15

申请号：US12347055

申请日：2008-12-31

Applicant: Hyung Wook Moon ,  Jeong Woo Lee ,  Won Jun Choi

Inventor： Hyung Wook Moon ,  Jeong Woo Lee ,  Won Jun Choi

IPC: G11C8/00

CPC classification number: G11C8/12 ,  G11C7/1045 ,  G11C11/408

Abstract: A semiconductor memory apparatus includes first and second bank blocks, a mode generator configured to generate a chip select mode signal used to control an operational mode of the first and second bank blocks, and a controller configured to drive the first and second bank blocks in response to the chip select mode signal, first and second select signals, and a predetermined address signal that are used to control driving of the first and second bank blocks, wherein the controller receives the chip select mode signal having a level used to determine a single chip mode to control operation of the first and second bank blocks in one rank unit, and the first and second bank blocks are selectively activated by using the predetermined address signal.

Abstract translation: 半导体存储装置包括第一和第二存储块，模式发生器，被配置为产生用于控制第一和第二存储块的操作模式的芯片选择模式信号;以及控制器，被配置为响应于驱动第一和第二存储块 与芯片选择模式信号，第一和第二选择信号以及用于控制第一和第二存储块的驱动的预定地址信号，其中控制器接收具有用于确定单个芯片的电平的芯片选择模式信号 模式，以一个等级单位来控制第一和第二存储区块的操作，并且通过使用预定的地址信号来选择性地激活第一和第二存储体块。