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    Method, structure, and design structure for an impedance-optimized microstrip transmission line for multi-band and ultra-wide band applications
    3.
    发明授权
    Method, structure, and design structure for an impedance-optimized microstrip transmission line for multi-band and ultra-wide band applications 有权
    用于多频带和超宽带应用的阻抗优化微带传输线的方法，结构和设计结构

    公开(公告)号：US08164397B2

    公开(公告)日：2012-04-24

    申请号：US12542368

    申请日：2009-08-17

    申请人： Guoan Wang ,  Wayne H. Woods, Jr.

    发明人： Guoan Wang ,  Wayne H. Woods, Jr.

    IPC分类号： H03H7/38

    CPC分类号： H01P3/081 ,  H01P3/006

    摘要： A method, structure, and design structure for an impedance-optimized microstrip transmission line for multi-band and ultra-wide band applications. A method includes: forming a plurality of openings in a ground plane associated with a signal line; forming a plurality of capacitance plates in the plurality of openings; and connecting the plurality of capacitance plates to the signal line with a plurality of posts extending between the signal line and the plurality of capacitance plates.

    摘要翻译： 用于多频带和超宽带应用的阻抗优化微带传输线的方法，结构和设计结构。 一种方法包括：在与信号线相关联的接地平面中形成多个开口; 在所述多个开口中形成多个电容板; 以及在所述信号线与所述多个电容板之间延伸的多个支柱将所述多个电容板连接到所述信号线。

    On-chip integrated voltage-controlled variable inductor, methods of making and tuning such variable inductors, and design structures integrating such variable inductors
    4.
    发明授权
    On-chip integrated voltage-controlled variable inductor, methods of making and tuning such variable inductors, and design structures integrating such variable inductors 有权
    片上集成电压可变电感器，制造和调谐这种可变电感器的方法，以及集成这种可变电感器的设计结构

    公开(公告)号：US08138876B2

    公开(公告)日：2012-03-20

    申请号：US12021339

    申请日：2008-01-29

    申请人： Hanyi Ding ,  Essam F. Mina ,  Wayne H. Woods

    发明人： Hanyi Ding ,  Essam F. Mina ,  Wayne H. Woods

    IPC分类号： H01F5/00 ,  H01F27/28 ,  H01F7/06 ,  H01L27/08 ,  H03H7/00

    CPC分类号： H01F21/005 ,  H01F17/0006 ,  H01F21/12 ,  Y10T29/4902

    摘要： On-chip integrated variable inductors, methods of making and tuning an on-chip integrated variable inductor, and design structures embodying a circuit containing the on-chip integrated variable inductor. The inductor generally includes a signal line configured to carry an electrical signal, a ground line positioned in proximity to the signal line, and at least one control unit electrically coupled with the ground line. The at least one control unit is configured to open and close switch a current path connecting the ground line with a ground potential so as to change an inductance of the signal line.

    摘要翻译： 片上集成可变电感器，制造和调谐片上集成可变电感器的方法，以及体现包含片上集成可变电感器的电路的设计结构。 电感器通常包括配置为承载电信号的信号线，位于信号线附近的接地线以及与接地线电耦合的至少一个控制单元。 至少一个控制单元被配置为打开和闭合将接地线连接到地电位的电流路径，以便改变信号线的电感。

    Structure for a through-silicon-via on-chip passive MMW bandpass filter
    5.
    发明授权
    Structure for a through-silicon-via on-chip passive MMW bandpass filter 有权
    用于硅通孔片上无源MMW带通滤波器的结构

    公开(公告)号：US08120145B2

    公开(公告)日：2012-02-21

    申请号：US12140364

    申请日：2008-06-17

    申请人： Amit Bavisi ,  Hanyi Ding ,  Guoan Wang ,  Wayne H. Woods, Jr. ,  Jiansheng Xu

    发明人： Amit Bavisi ,  Hanyi Ding ,  Guoan Wang ,  Wayne H. Woods, Jr. ,  Jiansheng Xu

    IPC分类号： H01L27/06

    CPC分类号： H01P1/20363

    摘要： A design structure is embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes a substrate including a silicon layer. Furthermore, the design structure includes a metal layer on a bottom side of the silicon layer and a dielectric layer on a top side of the silicon layer. Additionally, the design structure includes a top-side interconnect of the through-silicon via bandpass filter on a surface of the dielectric layer and a plurality of contacts in the dielectric layer in contact with the top-side interconnect. Further, the design structure includes a plurality of through-silicon vias through the substrate and in contact with the plurality of contacts, respectively, and the metal layer.

    摘要翻译： 设计结构体现在用于设计，制造或测试设计的机器可读介质中。 该设计结构包括具有硅层的基板。 此外，设计结构包括在硅层的底侧上的金属层和在硅层的顶侧上的介电层。 此外，该设计结构包括在电介质层的表面上的通过硅通孔带通滤波器的顶侧互连以及与顶侧互连件接触的介电层中的多个触点。 此外，设计结构包括分别通过基板并与多个触点和金属层接触的多个穿硅通孔。

    Method and System of Linking On-Chip Parasitic Coupling Capacitance Into Distributed Pre-Layout Passive Models
    6.
    发明申请
    Method and System of Linking On-Chip Parasitic Coupling Capacitance Into Distributed Pre-Layout Passive Models 有权
    将片上寄生耦合电容连接到分布式预布局被动模型中的方法和系统

    公开(公告)号：US20100333051A1

    公开(公告)日：2010-12-30

    申请号：US12494723

    申请日：2009-06-30

    申请人： Wayne H. Woods ,  Cole E. Zemke

    发明人： Wayne H. Woods ,  Cole E. Zemke

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5036

    摘要： A method of linking on-chip parasitic coupling capacitance into distributed pre-layout passive models such as distributed transmission line models and on-chip spiral inductor models includes recognizing a passive device such as a distributed transmission line device and an on-chip spiral inductor device, interpreting data obtained from the recognizing the passive device, breaking the passive device into a plurality of sections, the plurality of sections including a terminal of a model call, extracting parameters of the passive device by Layout Versus Schematic (LVS) and parasitic extraction, connecting the terminal to a pre-layout passive network by selectively low and high resistive paths set by the parameters of the passive device depending on whether crossing lines are present or not present in one of the plurality of sections, connecting the terminal to a distributed passive model, and coupling the crossing lines to the terminal via capacitors produced in an extracted netlist with the passive device having distributed coupling to a plurality of crossing lines.

    摘要翻译： 将片上寄生耦合电容连接到分布式预布置无源模型（如分布式传输线模型和片上螺旋电感模型）中的方法包括识别无源器件，如分布式传输线器件和片上螺旋电感器器件 解释从识别无源设备获取的数据，将无源设备分解为多个部分，所述多个部分包括模型呼叫的终端，通过布局对比示意图（LVS）和寄生提取来提取被动设备的参数， 通过由无源设备的参数设置的选择性低电平和高阻抗路径将终端连接到预布置的无源网络，这取决于是否存在交叉线是否存在多个部分之一，将终端连接到分布式被动 模型，并通过在提取的网表中产生的电容将交叉线耦合到终端 无源器件具有分布耦合到多个交叉线。

    COPLANAR WAVEGUIDE STRUCTURES AND DESIGN STRUCTURES FOR RADIOFREQUENCY AND MICROWAVE INTEGRATED CIRCUITS
    7.
    发明申请
    COPLANAR WAVEGUIDE STRUCTURES AND DESIGN STRUCTURES FOR RADIOFREQUENCY AND MICROWAVE INTEGRATED CIRCUITS 有权
    用于无线电和微波集成电路的共振波导结构和设计结构

    公开(公告)号：US20090251232A1

    公开(公告)日：2009-10-08

    申请号：US12061950

    申请日：2008-04-03

    申请人： Hanyi Ding ,  Essam F. Mina ,  Guoan Wang ,  Wayne H. Woods

    发明人： Hanyi Ding ,  Essam F. Mina ,  Guoan Wang ,  Wayne H. Woods

    IPC分类号： H01P3/00 ,  H01P3/08

    CPC分类号： H01P3/003

    摘要： Coplanar waveguide structures and design structures for radiofrequency and microwave integrated circuits. The coplanar waveguide structure includes a signal conductor and ground conductors generally coplanar with the signal conductor. The signal conductor is disposed between upper and lower arrays of substantially parallel shield conductors. Conductive bridges, which are electrically isolated from the signal conductor, are located laterally between the signal conductor and each of the ground conductors. Pairs of the conductive bridges connect one of the shield conductors in the first array with one of the shield conductors in the second array to define closed loops encircling the signal line.

    摘要翻译： 射频和微波集成电路的共面波导结构和设计结构。 共面波导结构包括信号导体和与信号导体大致共面的接地导体。 信号导体设置在基本上平行的屏蔽导体的上和下阵列之间。 与信号导体电隔离的导电桥横向位于信号导体和每个接地导体之间。 一对导电桥将第一阵列中的一个屏蔽导体与第二阵列中的一个屏蔽导体连接，以限定围绕信号线的闭环。

    METHODS FOR DISTRIBUTING A RANDOM VARIABLE USING STATISTICALLY-CORRECT SPATIAL INTERPOLATION
    8.
    发明申请
    METHODS FOR DISTRIBUTING A RANDOM VARIABLE USING STATISTICALLY-CORRECT SPATIAL INTERPOLATION 有权
    使用统计 - 正确空间插值分配随机变量的方法

    公开(公告)号：US20090204367A1

    公开(公告)日：2009-08-13

    申请号：US12030462

    申请日：2008-02-13

    申请人： Jeffrey G. Hemmett ,  Mukesh Kumar ,  Wayne H. Woods, JR. ,  Cole E. Zemke

    发明人： Jeffrey G. Hemmett ,  Mukesh Kumar ,  Wayne H. Woods, JR. ,  Cole E. Zemke

    IPC分类号： G06F17/18

    CPC分类号： G06F17/18

    摘要： Methods for distributing a random variable by spatial interpolation with statistical corrections. The method includes assigning a numerical value of the random variable at each vertex of an array of equilateral triangles formed in a planar coordinate frame and defining a plurality of test points at respective spatial locations in the planar coordinate frame that are bounded by the array of equilateral triangles. A numerical value of the random variable is distributed at each of the test points by spatial interpolation from one or more of the numerical values of the random variable assigned at each vertex of the array of equilateral triangles. The method further includes adjusting the numerical value of the random variable distributed at each of the test points with a respective correction factor.

    摘要翻译： 通过统计校正的空间插值分布随机变量的方法。 该方法包括在平面坐标系中形成的等边三角形阵列的每个顶点处分配随机变量的数值，并且在平面坐标系中的由等边阵列限定的相应空间位置处限定多个测试点 三角形。 随机变量的数值通过从等边三角形阵列的每个顶点处分配的随机变量的一个或多个数值中的空间插值分布在每个测试点。 该方法还包括用相应的校正因子来调整在每个测试点分布的随机变量的数值。

    On-chip variable delay transmission line with fixed characteristic impedance
    10.
    发明授权
    On-chip variable delay transmission line with fixed characteristic impedance 有权
    具有固定特性阻抗的片上可变延迟传输线

    公开(公告)号：US08508314B2

    公开(公告)日：2013-08-13

    申请号：US13441245

    申请日：2012-04-06

    申请人： Hanyi Ding ,  Wayne H. Woods, Jr.

    发明人： Hanyi Ding ,  Wayne H. Woods, Jr.

    IPC分类号： H01P1/18

    CPC分类号： H01P9/00 ,  H01P1/184

    摘要： A design structure, structure, and method for providing an on-chip variable delay transmission line with a fixed characteristic impedance. A method of manufacturing a transmission line structure includes forming a signal line of the transmission line structure, forming a first ground return structure that causes a first delay and a first characteristic impedance in the transmission line structure, and forming a second ground return structure that causes a second delay and a second characteristic impedance in the transmission line structure. The first delay is different from the second delay, and the first characteristic impedance is substantially the same as the second characteristic impedance.

    摘要翻译： 一种用于提供具有固定特性阻抗的片上可变延迟传输线的设计结构，结构和方法。 制造传输线结构的方法包括形成传输线结构的信号线，形成在传输线结构中引起第一延迟和第一特性阻抗的第一接地返回结构，以及形成第二接地返回结构，其导致 传输线结构中的第二延迟和第二特性阻抗。 第一延迟与第二延迟不同，第一特征阻抗基本上与第二特征阻抗相同。