公开(公告)号：US07692087B2

公开(公告)日：2010-04-06

申请号：US11810872

申请日：2007-06-06

申请人： Masatsugu Okazaki ,  Tokio Shirakawa

发明人： Masatsugu Okazaki ,  Tokio Shirakawa

IPC分类号： G10H1/00

CPC分类号： G10H7/12 ,  G10H7/02 ,  G10H2250/585 ,  G10H2250/595 ,  G10H2250/601 ,  G10H2250/621 ,  G10H2250/641

摘要： Compressed waveform data structure is proposed which is suited for segmentation of a plurality of samples of compressed waveform data into a plurality of frames and subsequent storage of each of the frames. The number of bits per sample of the compressed waveform data is variable between the frames, but uniform, i.e. the same among all of the samples, within each of the frames. Each of the frames has a same data storage size. Each of the frames includes, in a predetermined layout, an auxiliary information area for storing auxiliary information that includes compression-related information to be used for decompressing the compressed waveform data, and a data area for storing a plurality of samples of the compressed waveform data of the frame with each of the samples comprising a same number of bits. Thus, respective start positions of the frames and compressed waveform data in a memory can be fixed at predetermined positions common to the frames, so that readout control can be performed with ease.

摘要翻译： 提出了压缩波形数据结构，其适用于将压缩波形数据的多个样本分割成多个帧并随后存储每个帧。 每个样本的压缩波形数据的位数在帧之间是可变的，但在每个帧内是均匀的，即所有采样中的相同。 每个帧具有相同的数据存储大小。 每个帧以预定布局包括用于存储辅助信息的辅助信息区域，该辅助信息区域包括用于解压缩压缩波形数据的压缩相关信息，以及用于存储压缩波形数据的多个样本的数据区域 其中每个样本包括相同数量的比特。 因此，存储器中的帧和压缩波形数据的各个开始位置可以固定在帧共同的预定位置处，从而可以容易地执行读出控制。

公开(公告)号：US20080078280A1

公开(公告)日：2008-04-03

申请号：US11860484

申请日：2007-09-24

申请人： Masatsugu OKAZAKI ,  Tokio SHIRAKAWA

发明人： Masatsugu OKAZAKI ,  Tokio SHIRAKAWA

IPC分类号： G10H7/00

CPC分类号： G10H7/12 ,  G10H7/02 ,  G10H2250/585 ,  G10H2250/595 ,  G10H2250/601 ,  G10H2250/621 ,  G10H2250/641

摘要： Compressed waveform data structure is proposed which is suited for segmentation of a plurality of samples of compressed waveform data into a plurality of frames and subsequent storage of each of the frames. The number of bits per sample of the compressed waveform data is variable between the frames, but uniform, i.e. the same among all of the samples, within each of the frames. Each of the frames has a same data storage size. Each of the frames includes, in a predetermined layout, an auxiliary information area for storing auxiliary information that includes compression-related information to be used for decompressing the compressed waveform data, and a data area for storing a plurality of samples of the compressed waveform data of the frame with each of the samples comprising a same number of bits. Thus, respective start positions of the frames and compressed waveform data in a memory can be fixed at predetermined positions common to the frames, so that readout control can be performed with ease.

摘要翻译： 提出了压缩波形数据结构，其适用于将压缩波形数据的多个样本分割成多个帧并随后存储每个帧。 每个样本的压缩波形数据的位数在帧之间是可变的，但在每个帧内是均匀的，即所有采样中的相同。 每个帧具有相同的数据存储大小。 每个帧以预定布局包括用于存储辅助信息的辅助信息区域，该辅助信息区域包括用于解压缩压缩波形数据的压缩相关信息，以及用于存储压缩波形数据的多个样本的数据区域 其中每个样本包括相同数量的比特。 因此，存储器中的帧和压缩波形数据的各个开始位置可以固定在帧共同的预定位置处，从而可以容易地执行读出控制。

公开(公告)号：US20060081118A1

公开(公告)日：2006-04-20

申请号：US11289881

申请日：2005-11-29

申请人： Masatsugu Okazaki ,  Tokio Shirakawa

发明人： Masatsugu Okazaki ,  Tokio Shirakawa

IPC分类号： G10H7/00

CPC分类号： G10H7/12 ,  G10H7/02 ,  G10H2250/585 ,  G10H2250/595 ,  G10H2250/601 ,  G10H2250/621 ,  G10H2250/641

摘要： Compressed waveform data structure is proposed which is suited for segmentation of a plurality of samples of compressed waveform data into a plurality of frames and subsequent storage of each of the frames. The number of bits per sample of the compressed waveform data is variable between the frames, but uniform, i.e. the same among all of the samples, within each of the frames. Each of the frames has a same data storage size. Each of the frames includes, in a predetermined layout, an auxiliary information area for storing auxiliary information that includes compression-related information to be used for decompressing the compressed waveform data, and a data area for storing a plurality of samples of the compressed waveform data of the frame with each of the samples comprising a same number of bits. Thus, respective start positions of the frames and compressed waveform data in a memory can be fixed at predetermined positions common to the frames, so that readout control can be performed with ease.

摘要翻译： 提出了压缩波形数据结构，其适用于将压缩波形数据的多个样本分割成多个帧并随后存储每个帧。 每个样本的压缩波形数据的位数在帧之间是可变的，但在每个帧内是均匀的，即所有采样中的相同。 每个帧具有相同的数据存储大小。 每个帧以预定布局包括用于存储辅助信息的辅助信息区域，该辅助信息区域包括用于解压缩压缩波形数据的压缩相关信息，以及用于存储压缩波形数据的多个样本的数据区域 其中每个样本包括相同数量的比特。 因此，存储器中的帧和压缩波形数据的各个开始位置可以固定在帧共同的预定位置处，从而可以容易地执行读出控制。

公开(公告)号：US06739043B2

公开(公告)日：2004-05-25

申请号：US10219253

申请日：2002-08-16

申请人： Tokio Shirakawa

发明人： Tokio Shirakawa

IPC分类号： H05K330

CPC分类号： H05K13/021 ,  H05K13/0434 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/53174 ,  Y10T29/53178 ,  Y10T29/53191 ,  Y10T29/53261

摘要： An electronic component taken out from a component storage section by a transfer head is held by suction, transferred and inspected as to whether it is good or defective by a good/defective component inspecting device. Thereafter, the electronic component is delivered to an alignment suction nozzle on a component alignment section. The sequence of the above-operations is then repeated, whereby the electronic components inspected and then aligned in the order of mounting can be supplied to a mounting head. Therefore, a mount time for the electronic components in a mount process is greatly shortened, so that productivity is expected to be improved. The electronic components can also be inspected before being aligned in the order of mounting, which further enhances mount efficiency.

摘要翻译： 通过传送头从部件存储部分中取出的电子部件通过抽吸，传送和检查来保持是否良好或有缺陷的部件检查装置。 此后，电子部件被输送到部件对准部上的对准吸嘴。 然后重复上述操作的顺序，由此检查并依次安装的顺序的电子部件可以被提供给安装头。 因此，安装工序中的电子部件的安装时间大大缩短，能够提高生产率。 电子元件在安装顺序对准之前也可以进行检查，这进一步提高了安装效率。

公开(公告)号：US20100236384A1

公开(公告)日：2010-09-23

申请号：US12729070

申请日：2010-03-22

申请人： Taro SHIRAHAMA ,  Tokio SHIRAKAWA ,  Shigematsu FUJITA

发明人： Taro SHIRAHAMA ,  Tokio SHIRAKAWA ,  Shigematsu FUJITA

IPC分类号： G10H7/04

CPC分类号： G10H1/183 ,  G10H7/04 ,  G10H2230/031 ,  G10H2230/041

摘要： With no interrupt to a CPU, waveform data stored in a NAND-type flash memory are read out on a page-by-page basis to supply a buffer of a waveform memory with waveform sample data. A series of waveform data are prestored in successive pages of the intermediate buffer capable of high-speed page access thereto. Page number of a page to be read out first is set, and that page is read into a buffer in advance. Before completion of readout of the first page, another page to be read out next is loaded into the buffer. After that, the page number is incremented by one each time readout of one page is completed, and the waveform sample data of the page number continue to be reproduced while being read into the buffer.

摘要翻译： 在没有中断CPU的情况下，存储在NAND型闪速存储器中的波形数据逐页读出，为波形存储器的缓冲器提供波形采样数据。 一系列波形数据预先存储在能够高速访问其的中间缓冲器的连续页中。 首先设置要读取的页面的页码，并将该页面预先读入缓冲区。 在完成第一页的读出之前，接下来要读出的另一个页面被加载到缓冲器中。 之后，每次完成一页的读出时，页码增加1，并且在读入缓冲器的同时，页码的波形采样数据继续被再现。

公开(公告)号：US6119336A

公开(公告)日：2000-09-19

申请号：US936915

申请日：1997-09-25

申请人： Takao Kashiwazaki ,  Tokio Shirakawa ,  Koichi Yasunaga ,  Hironori Konno

发明人： Takao Kashiwazaki ,  Tokio Shirakawa ,  Koichi Yasunaga ,  Hironori Konno

IPC分类号： H05K13/04 ,  H05K13/08 ,  H05K3/30

CPC分类号： H05K13/08 ,  H05K13/0413 ,  H05K13/0417 ,  Y10T29/4913 ,  Y10T29/53178 ,  Y10T29/53191 ,  Y10T29/53261

摘要： This invention provides an electronic component sucking method in which the movement of a component supply table (15) can be increased without increasing tact time, thereby improving the mounting efficiency of electronic components (2, 4). According to this invention, the movement disabled period of the component supply table (15) is set on the basis of the height of an electronic component (2, 4) in order that the interlock time for a low electronic component (4) can be set to be shorter and the movement enabled period of the component supply table (15) can be set to be longer. Therefore, a low electronic component (4) can have a shorter tact time, thereby improving the overall mounting efficiency of electronic components.

摘要翻译： 本发明提供一种电子部件吸附方法，其中，可以在不增加节拍时间的情况下增加部件供给台（15）的移动，从而提高电子部件（2,4）的安装效率。 根据本发明，基于电子部件（2,4）的高度来设定部件供给台（15）的移动禁止期间，以使低电子部件（4）的互锁时间为 设定为较短，并且可以将部件供给台（15）的运动使能期间设定为较长。 因此，低电子部件（4）可以具有较短的节拍时间，从而提高电子部件的整体安装效率。

公开(公告)号：US09040800B2

公开(公告)日：2015-05-26

申请号：US13355405

申请日：2012-01-20

申请人： Tokio Shirakawa

发明人： Tokio Shirakawa

IPC分类号： G10H7/00 ,  G10H7/02

CPC分类号： G10H7/02 ,  G10H2250/621

摘要： A musical tone signal generating apparatus has waveform memory WM which stores a plurality of compressed data sets obtained by compressing, by linear prediction, sample values obtained by sampling musical tones. The musical tone signal generating apparatus has cache circuit 740 which reads out compressed data from waveform memory WM within an assigned computing period in response to instructions to generate a musical tone, and decoding circuit 750 which decodes the compressed data and outputs the decoded data as the data indicative of a sample value. The musical tone signal generating apparatus has CPU 901 inputs tone pitch information indicative of a tone pitch of a musical tone which is to be generated, identifies waveform data which is to be read out by cache circuit 740 from waveform memory WM and determines, in accordance with the identified waveform data, the length of the computing period which is to be assigned.

摘要翻译： 乐音信号发生装置具有波形存储器WM，该波形存储器WM存储通过线性预测压缩获得的多个压缩数据集，所述样本值通过对乐音进行抽样而获得。 音乐信号发生装置具有高速缓存电路740，其响应于生成音调的指令，在分配的计算周期内从波形存储器WM中读出压缩数据;以及解码电路750，解码压缩数据并将解码的数据作为 指示样本值的数据。 乐音信号发生装置具有CPU 901输入表示要产生的乐音的音调音调的音调信号，识别由高速缓存电路740从波形存储器WM读出的波形数据，并根据 具有所识别的波形数据，将被分配的计算周期的长度。

公开(公告)号：US07256340B2

公开(公告)日：2007-08-14

申请号：US11289881

申请日：2005-11-29

申请人： Masatsugu Okazaki ,  Tokio Shirakawa

发明人： Masatsugu Okazaki ,  Tokio Shirakawa

IPC分类号： G10H7/00

CPC分类号： G10H7/12 ,  G10H7/02 ,  G10H2250/585 ,  G10H2250/595 ,  G10H2250/601 ,  G10H2250/621 ,  G10H2250/641

摘要： Compressed waveform data structure is proposed which is suited for segmentation of a plurality of samples of compressed waveform data into a plurality of frames and subsequent storage of each of the frames. The number of bits per sample of the compressed waveform data is variable between the frames, but uniform, i.e. the same among all of the samples, within each of the frames. Each of the frames has a same data storage size. Each of the frames includes, in a predetermined layout, an auxiliary information area for storing auxiliary information that includes compression-related information to be used for decompressing the compressed waveform data, and a data area for storing a plurality of samples of the compressed waveform data of the frame with each of the samples comprising a same number of bits. Thus, respective start positions of the frames and compressed waveform data in a memory can be fixed at predetermined positions common to the frames, so that readout control can be performed with ease.

摘要翻译： 提出了压缩波形数据结构，其适用于将压缩波形数据的多个样本分割成多个帧并随后存储每个帧。 每个样本的压缩波形数据的位数在帧之间是可变的，但在每个帧内是均匀的，即所有采样中的相同。 每个帧具有相同的数据存储大小。 每个帧以预定布局包括用于存储辅助信息的辅助信息区域，该辅助信息区域包括用于解压缩压缩波形数据的压缩相关信息，以及用于存储压缩波形数据的多个样本的数据区域 其中每个样本包括相同数量的比特。 因此，存储器中的帧和压缩波形数据的各个开始位置可以固定在帧共同的预定位置处，从而可以容易地执行读出控制。

公开(公告)号：US5804750A

公开(公告)日：1998-09-08

申请号：US763720

申请日：1996-12-13

申请人： Tokio Shirakawa ,  Masaki Kudo ,  Shizuhiko Kawai

发明人： Tokio Shirakawa ,  Masaki Kudo ,  Shizuhiko Kawai

IPC分类号： G10H1/18 ,  G10H1/02 ,  G10H7/00

CPC分类号： G10H7/006 ,  G10H7/004

摘要： A control circuit is integrated in a semiconductor chip for controlling operation of an electronic musical instrument according to a custom program stored in an external memory so as to generate a musical tone. In the control circuit, an internal memory is formed in the semiconductor chip separately from the external memory for permanently storing a common program which is dedicated to synthesis of the musical tone while the custom program stored in the external memory is customized for the operation of the electronic musical instrument. A tone synthesizer is formed in the same semiconductor chip for synthesizing -,he musical tone when the common program is executed. A central processor is formed in the same semiconductor chip integrally with the tone synthesizer and the internal memory for executing the custom program to control the operation of the electronic musical instrument and for executing the common program to effectuate the synthesis of the musical tone to generate the same sequentially in response to the operation of the electronic musical instrument.

摘要翻译： 控制电路集成在半导体芯片中，用于根据存储在外部存储器中的定制程序控制电子乐器的操作，以便产生乐音。 在控制电路中，与外部存储器分离地形成在半导体芯片中的内部存储器，用于永久存储专用于音乐合成的公共程序，同时存储在外部存储器中的定制程序被定制用于 电子乐器。 音频合成器形成在同一半导体芯片中，用于合成 - 当执行公共节目时，它是音调。 中央处理器与与音调合成器和内部存储器整体形成在同一半导体芯片中，用于执行定制程序以控制电子乐器的操作并执行公共程序以实现乐音的合成以产生 响应于电子乐器的操作顺序地相同。

公开(公告)号：US5804749A

公开(公告)日：1998-09-08

申请号：US773200

申请日：1996-12-24

申请人： Tokio Shirakawa ,  Masaki Kudo ,  Shizuhiko Kawai

发明人： Tokio Shirakawa ,  Masaki Kudo ,  Shizuhiko Kawai

IPC分类号： G10H7/00 ,  G10H7/02 ,  G11C7/00 ,  G11C7/16 ,  H03M7/00

CPC分类号： G11C7/00 ,  G10H7/002 ,  G10H7/02 ,  G11C7/16 ,  G11C2207/16

摘要： In a sound source apparatus, a central processing unit is integrated in a semiconductor chip and operates in response to a primary operating clock signal for creating a control message. A tone generating unit is integrated in the same semiconductor chip and operates in response to a secondary operating clock signal for generating a musical tone according to the control message. A master clock generator generates a master clock signal having a desired frequency selected from a plurality of frequencies. A mode changer designates one of a first mode and a second mode corresponding to different operating speeds. A clock generator is provided for variably frequency-dividing the master clock signal to generate the primary operating clock signal and the secondary operating clock signal. The clock generator is responsive to the mode changer for changing a frequency ratio of the primary operating clock signal to the secondary operating clock signal between the first mode and the second mode. An external memory is provided separately from the semiconductor chip for storing information required for generation of the musical tone. A memory controller is provided for allotting a primary time slot to the central processing unit and a secondary time slot to the tone generating unit such as to optimize access to the external memory shared by the central processing unit and the tone generating unit. A cache memory is provided to speed up operation of the central processing unit.

摘要翻译： 在声源装置中，中央处理单元被集成在半导体芯片中，并且响应于用于产生控制消息的主操作时钟信号而操作。 乐音产生单元集成在相同的半导体芯片中，并且响应于辅助操作时钟信号而操作，用于根据控制消息产生乐音。 主时钟发生器产生具有从多个频率选择的期望频率的主时钟信号。 模式转换器指定对应于不同操作速度的第一模式和第二模式之一。 提供时钟发生器用于可变地分频主时钟信号以产生主操作时钟信号和辅助操作时钟信号。 时钟发生器响应于模式转换器，用于在第一模式和第二模式之间改变初级工作时钟信号与辅助操作时钟信号的频率比。 与半导体芯片分离地提供外部存储器，用于存储产生音调所需的信息。 提供存储器控制器，用于将主时隙分配给中央处理单元，并将次要时隙分配给音调生成单元，以便优化对由中央处理单元和乐音发生单元共享的外部存储器的访问。 提供高速缓冲存储器以加速中央处理单元的操作。