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    Local silicidation of via bottoms in metallization systems of semiconductor devices
    3.
    发明授权
    Local silicidation of via bottoms in metallization systems of semiconductor devices 有权
    半导体器件金属化系统中通孔底部的局部硅化

    公开(公告)号：US08193086B2

    公开(公告)日：2012-06-05

    申请号：US12640444

    申请日：2009-12-17

    申请人： Tobias Letz ,  Frank Feustel

    发明人： Tobias Letz ,  Frank Feustel

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76814 ,  H01L21/76826 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76886

    摘要： Electromigration behavior in complex metallization systems of semiconductor devices may be enhanced at critical areas between a metal line and a via by locally forming a copper/silicon compound. In some illustrative embodiments, the formation of the copper/silicon compound may be combined with other treatments for cleaning the exposed surface areas and/or modifying the molecular structure thereof.

    摘要翻译： 通过局部形成铜/硅化合物，可以在金属线和通孔之间的关键区域增强半导体器件复杂金属化系统中的电迁移行为。 在一些说明性实施例中，铜/硅化合物的形成可以与用于清洁暴露的表面区域和/或改变其分子结构的其它处理组合。

    TEST SYSTEM AND METHOD OF REDUCING DAMAGE IN SEED LAYERS IN METALLIZATION SYSTEMS OF SEMICONDUCTOR DEVICES
    4.
    发明申请
    TEST SYSTEM AND METHOD OF REDUCING DAMAGE IN SEED LAYERS IN METALLIZATION SYSTEMS OF SEMICONDUCTOR DEVICES 有权
    在半导体器件金属化系统中减少种植层损伤的测试系统和方法

    公开(公告)号：US20100244028A1

    公开(公告)日：2010-09-30

    申请号：US12749805

    申请日：2010-03-30

    申请人： Frank Feustel ,  Tobias Letz ,  Frank Koschinsky

    发明人： Frank Feustel ,  Tobias Letz ,  Frank Koschinsky

    IPC分类号： H01L21/768 ,  H01L23/544

    CPC分类号： H01L22/12 ,  H01L21/76843 ,  H01L21/76877 ,  H01L23/544 ,  H01L2223/5442 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/00

    摘要： During the formation of a complex metallization system, the influence of a manufacturing environment on sensitive barrier/seed material systems may be monitored or controlled by using an appropriate test pattern and applying an appropriate test strategy. For example, actual probe and reference substrates may be prepared and may be processed with and without exposure to the manufacturing environment of interest, thereby enabling an efficient evaluation of one or more parameters of the environment. Furthermore, an “optimized” manufacturing environment may be obtained on the basis of the test strategy disclosed herein.

    摘要翻译： 在形成复杂的金属化系统期间，可以通过使用适当的测试图案并应用适当的测试策略来监测或控制制造环境对敏感屏障/种子材料系统的影响。 例如，可以制备实际的探针和参考基底并且可以在不暴露于感兴趣的制造环境的情况下进行处理，从而能够有效评估环境的一个或多个参数。 此外，可以基于本文公开的测试策略获得“优化的”制造环境。

    Semiconductor device comprising an in-chip active heat transfer system
    5.
    发明授权
    Semiconductor device comprising an in-chip active heat transfer system 有权
    半导体器件包括芯片内有源热传递系统

    公开(公告)号：US07924569B2

    公开(公告)日：2011-04-12

    申请号：US12551766

    申请日：2009-09-01

    申请人： Tobias Letz

    发明人： Tobias Letz

    IPC分类号： H05K7/20

    CPC分类号： H01L25/0657 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/00

    摘要： By providing thermoelectric elements, such as Peltier elements, in a semiconductor device, the overall heat management may be increased. In some illustrative embodiments, the corresponding active cooling/heating systems may be used in a stacked chip configuration to establish an efficient thermally conductive path between temperature critical circuit portions and a heat sink of the stacked chip configuration.

    摘要翻译： 通过在半导体器件中提供诸如珀耳帖元件之类的热电元件，可以提高整个热管理。 在一些说明性实施例中，相应的主动冷却/加热系统可以以堆叠的芯片配置使用，以在温度关键电路部分和堆叠芯片配置的散热器之间建立有效的导热路径。

    REDUCING COPPER DEFECTS DURING A WET CHEMICAL CLEANING OF EXPOSED COPPER SURFACES IN A METALLIZATION LAYER OF A SEMICONDUCTOR DEVICE
    9.
    发明申请
    REDUCING COPPER DEFECTS DURING A WET CHEMICAL CLEANING OF EXPOSED COPPER SURFACES IN A METALLIZATION LAYER OF A SEMICONDUCTOR DEVICE 有权
    在半导体器件的金属化层中暴露的铜表面的湿化学清洁期间减少铜缺陷

    公开(公告)号：US20090139543A1

    公开(公告)日：2009-06-04

    申请号：US12124445

    申请日：2008-05-21

    申请人： Frank Feustel ,  Tobias Letz ,  Christin Bartsch ,  Andreas Ott

    发明人： Frank Feustel ,  Tobias Letz ,  Christin Bartsch ,  Andreas Ott

    IPC分类号： B08B3/08

    CPC分类号： H01L21/02063 ,  H01L21/02068 ,  H01L21/67051 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76861

    摘要： By exposing a wet chemical cleaning solution, such as hydrofluoric acid, to a pressurized inert gas ambient prior to applying the solution to patterned dielectric materials of semiconductor devices, the incorporation of oxygen into the liquid during storage and application may be significantly reduced. For instance, by generating a substantially saturated state in the pressurized inert gas ambient, a substantially oversaturated state may be achieved during the application of the liquid in ambient air, thereby enhancing efficiency of the treatment, for instance, by reducing the amount of material removal of exposed copper surfaces after trench patterning, without requiring sophisticated modifications of process chambers.

    摘要翻译： 在将溶液施加到半导体器件的图案化电介质材料之前，通过将诸如氢氟酸的湿化学清洁溶液暴露于加压惰性气体环境中，可以显着减少在存储和施加期间将氧气引入液体中。 例如，通过在加压惰性气体环境中产生基本上饱和的状态，在将液体施加到环境空气中时可以实现基本上过饱和的状态，从而提高处理效率，例如通过减少材料去除量 在沟槽图案化之后的暴露的铜表面，而不需要对处理室进行复杂的修改。