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7 条记录 (耗时 0.016 秒)

    Arrangement for control of the operation of a random access memory in a data processing system
    1.
    发明授权
    Arrangement for control of the operation of a random access memory in a data processing system 失效
    用于控制数据处理系统中的随机存取存储器的操作的布置

    公开(公告)号：US4417318A

    公开(公告)日：1983-11-22

    申请号：US35237

    申请日：1979-05-02

    申请人： Shigeru Hirahata ,  Teruhiro Takezawa ,  Nobuo Onuki ,  Shigeru Komatsu ,  Tsuguji Tachiuchi

    发明人： Shigeru Hirahata ,  Teruhiro Takezawa ,  Nobuo Onuki ,  Shigeru Komatsu ,  Tsuguji Tachiuchi

    IPC分类号： G09G5/00 ,  G09G1/16 ,  G09G5/22 ,  G06F3/00 ,  G11C11/34

    CPC分类号： G09G5/001

    摘要： A data processing system has a dynamic type memory, a static type memory for storing data periodically read out, a central processing unit for transferring data to and from the two memories, an address generating circuit for periodically applying an address to the static type memory to read out the contents thereof, and an address selecting unit for exclusively selecting an address from the central processing unit or an address from the address generating circuit. In the system, the two memories are connected to the address selecting unit in order that the address selected by the address selecting means is supplied common to both the memories.

    摘要翻译： 数据处理系统具有动态型存储器，用于存储周期性读出的数据的静态存储器，用于向两个存储器传送数据的中央处理单元，用于周期性地向静态存储器施加地址的地址生成电路 读取其内容，以及地址选择单元，用于从中央处理单元专门选择地址或地址生成电路的地址。 在该系统中，两个存储器连接到地址选择单元，以便将由地址选择装置选择的地址提供给两个存储器。

    Character pattern display system
    2.
    发明授权
    Character pattern display system 失效
    字符图案显示系统

    公开(公告)号：US4298931A

    公开(公告)日：1981-11-03

    申请号：US44379

    申请日：1979-06-01

    申请人： Tsuguji Tachiuchi ,  Shigeru Hirahata ,  Teruhiro Takezawa

    发明人： Tsuguji Tachiuchi ,  Shigeru Hirahata ,  Teruhiro Takezawa

    IPC分类号： G06F13/18 ,  G09G1/16 ,  G09G5/00 ,  G09G5/22 ,  G06F13/00

    CPC分类号： G09G5/222 ,  G06F13/18 ,  G09G5/001

    摘要： A data processing system such as a character display system is provided with a first memory circuit for storing coded characters to be displayed, a second memory circuit for storing picture element information of characters to be displayed, and a character display drive circuit for extracting the coded character information from said first memory circuit and extracting and reproducing the picture element information from said second memory circuit. The first memory circuit includes a plurality of random access memories (RAMs). The character display system further includes an address switching circuit for successively and alternately applying an address signal from the character display drive circuit to the RAMs, and an output signal switching circuit for switching the information output signals extracted from the RAMs in synchronism with the switching operation of the address switching circuit. With a simple and relatively inexpensive circuit construction, the character display system may always display characters. The system further includes a clock signal changing means to freely make access to the RAMs without using a program.

    摘要翻译： 诸如字符显示系统的数据处理系统设置有用于存储要显示的编码字符的第一存储器电路，用于存储要显示的字符的图像元素信息的第二存储器电路，以及用于提取编码的字符显示驱动电路 来自所述第一存储器电路的字符信息，并从所述第二存储器电路提取和再现所述图像元素信息。 第一存储器电路包括多个随机存取存储器（RAM）。 字符显示系统还包括一个地址切换电路，用于将字符显示驱动电路的地址信号连续地交替地施加到RAM;以及输出信号切换电路，用于与切换操作同步地切换从RAM提取的信息输出信号 的地址切换电路。 通过简单且相对便宜的电路结构，字符显示系统可以总是显示字符。 该系统还包括时钟信号改变装置，用于在不使用程序的情况下自由地访问RAM。

    Signal editing and processing apparatus
    5.
    发明授权
    Signal editing and processing apparatus 失效
    信号编辑和处理装置

    公开(公告)号：US3991265A

    公开(公告)日：1976-11-09

    申请号：US470865

    申请日：1974-05-17

    申请人： Masaaki Fukuda ,  Tatsuo Kayano ,  Takashi Uehara ,  Takehiko Yoshino ,  Eiichi Sawabe ,  Hisakichi Yamane ,  Akio Yanagimachi ,  Teruhiro Takezawa ,  Michio Masuda ,  Hiroaki Nabeyama

    发明人： Masaaki Fukuda ,  Tatsuo Kayano ,  Takashi Uehara ,  Takehiko Yoshino ,  Eiichi Sawabe ,  Hisakichi Yamane ,  Akio Yanagimachi ,  Teruhiro Takezawa ,  Michio Masuda ,  Hiroaki Nabeyama

    IPC分类号： H04N1/00 ,  H04N5/00

    CPC分类号： H04N1/00098

    摘要： A signal editing and processing technique for converting a plurality of continuous signals, especially long term continuous audio signals respectively relating to short term still picture signals, to a transmitting signal in which signal transmission periods and pause periods are provided, having an integer ratio of time duration with each other, wherein other signals, especially the picture signals, should be transmitted. All continuous signals are sequentially converted to digital signals addressed in accordance with relevant continuous signals, and once stored in arbitrary positions of a memory, and then read out in a given multiplexed sequence corresponding to the transmission periods of the transmitting signal. The read out multiplexed digital signals are sequentially stored in another memory, and then read out with a given high speed equal to that of the signal transmission. The digital signals read out with the high speed are stored in still another memory, and then read out repeatedly to form the transmitting signal.

    摘要翻译： 一种信号编辑和处理技术，用于将分别涉及短期静止图像信号的多个连续信号，特别是长期连续音频信号转换成其中提供信号传输周期和暂停时段的发射信号，其具有时间的整数比 持续时间，其中其他信号，特别是图像信号应当被发送。 所有的连续信号被顺序地转换成根据相关连续信号寻址的数字信号，并且一旦存储在存储器的任意位置，然后以对应于发送信号的发送周期的给定多路复用序列读出。 读出的复用数字信号被顺序存储在另一个存储器中，然后以与信号传输相同的给定高速读出。 以高速读出的数字信号存储在另一个存储器中，然后重复读出以形成发送信号。