公开(公告)号：US06178126B1

公开(公告)日：2001-01-23

申请号：US09534423

申请日：2000-03-23

Applicant: Toshiaki Kirihata ,  Paul W. Coteus ,  Warren E. Maule ,  Steven Tomashot

Inventor： Toshiaki Kirihata ,  Paul W. Coteus ,  Warren E. Maule ,  Steven Tomashot

IPC: G11C1300

CPC classification number: G11C29/72 ,  G11C29/785

Abstract: A redundancy address in a plurality of memory devices is identified by at least two protocols available in an electric system. The first protocol is a mode register set command (or extended mode register set command). A chip select signal determines one of a plurality of memory modules, where a memory device is identified with at least one data port. Alternatively, a data strobe port or a data mask port may be preferably used for the selection of the memory devices instead of using the data port. The second protocol is a RAM access command which identifies a defective memory cell address (redundancy address) within the selected RAM by way of a plurality of address ports (ADRs). A redundancy address programming method is realized by way of electrically programmable fuses or by dynamically programmable redundancy latches integrated in each memory. The electric system configuration preferably includes a non-volatile storage device for storing a data port organization for the memory devices. Therein, the relation between the system memory data bus and the memory data ports for the memory devices are recognized by a memory controller. A microprocessor in the electric system is used for testing the memories and for analyzing the redundancy address. The present invention further includes a post device identification protocol to effectively debug field problems.

Abstract translation: 多个存储设备中的冗余地址由电气系统中可用的至少两种协议来识别。 第一个协议是模式寄存器设置命令（或扩展模式寄存器设置命令）。 芯片选择信号确定多个存储器模块中的一个，其中存储器件被识别为具有至少一个数据端口。 或者，可以优选地使用数据选通端口或数据掩码端口来选择存储设备，而不是使用数据端口。 第二协议是RAM访问命令，其通过多个地址端口（ADR）识别所选择的RAM内的有缺陷的存储器单元地址（冗余地址）。 通过电可编程熔丝或集成在每个存储器中的动态可编程冗余锁存器实现冗余地址编程方法。 电气系统配置优选地包括用于存储用于存储器件的数据端口组织的非易失性存储设备。 其中，存储器控制器识别系统存储器数据总线与存储器件的存储器数据端口之间的关系。 电气系统中的微处理器用于测试存储器和分析冗余地址。 本发明还包括有效调试现场问题的后期设备识别协议。