公开(公告)号：US20110182130A1

公开(公告)日：2011-07-28

申请号：US13082514

申请日：2011-04-08

Applicant: Timothy B. Cowles ,  Steve Casper

Inventor： Timothy B. Cowles ,  Steve Casper

IPC: G11C7/02 ,  H03K3/00

CPC classification number: H03K19/018528

Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.

Abstract translation: 公开了一种低电流输入缓冲器。 缓冲器使用自偏置N和P通道差分对，其输出端连接在一起。 自偏置有助于减少电流消耗。 N和P沟道差分对的组合导致了宽范围的参考电压和电源电压的对称性。

公开(公告)号：US5150186A

公开(公告)日：1992-09-22

申请号：US665558

申请日：1991-03-06

Applicant: David Pinney ,  Gary Johnson ,  Greg Roberts ,  Steve Casper

Inventor： David Pinney ,  Gary Johnson ,  Greg Roberts ,  Steve Casper

IPC: H03K19/003

CPC classification number: H03K19/00361

Abstract: A CMOS integrated circuit output terminal driver subcircuit (60) provides quick response at an output terminal (56) of an integrated circuit (50) while preventing reverse current leakage when an external high voltage, which exceeds the positive internal circuit source voltage of the integrated circuit, is imposed on the output terminal (56). The output driver subcircuit (60) additionally provides an output voltage at the output terminal that is only nominally below the internal circuit source voltage. A p-channel MOS pull-up transistor (62) is operably connected to the output terminal (56) to selectively drive it substantially to the internal circuit source voltage. A leakage prevention device (66), comprising a native n-channel transistor (68) with a low turn-on threshold voltage, is connected in series with the pull-up transistor (62) to prevent output terminal reverse current leakage back through the pull-up transistor (62) when the external high voltage is imposed upon the output terminal (56).

Abstract translation: CMOS集成电路输出端子驱动器分支电路（60）在集成电路（50）的输出端子（56）提供快速响应，同时当外部高电压超过集成电路（50）的正内部电源电压时，防止反向电流泄漏 电路施加在输出端子（56）上。 输出驱动器子电路（60）还额外地在输出端提供仅在名义上低于内部电路电源电压的输出电压。 P沟道MOS上拉晶体管（62）可操作地连接到输出端（56），以选择性地将其驱动到内部电路源电压。 包括具有低导通阈值电压的天然n沟道晶体管（68）的漏电保护装置（66）与上拉晶体管（62）串联连接，以防止输出端子反向电流通过 当外部高电压施加到输出端子（56）时，上拉晶体管（62）。

公开(公告)号：US07924067B2

公开(公告)日：2011-04-12

申请号：US12712414

申请日：2010-02-25

Applicant: Timothy B. Cowles ,  Steve Casper

Inventor： Timothy B. Cowles ,  Steve Casper

IPC: H03K3/00

CPC classification number: H03K19/018528

Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.

Abstract translation: 公开了一种低电流输入缓冲器。 缓冲器使用自偏置N和P通道差分对，其输出端连接在一起。 自偏置有助于减少电流消耗。 N和P沟道差分对的组合导致了宽范围的参考电压和电源电压的对称性。

公开(公告)号：US07696790B2

公开(公告)日：2010-04-13

申请号：US12268782

申请日：2008-11-11

Applicant: Timothy B. Cowles ,  Steve Casper

Inventor： Timothy B. Cowles ,  Steve Casper

IPC: H03K5/22

CPC classification number: H03K19/018528

Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.

Abstract translation: 公开了一种低电流输入缓冲器。 缓冲器使用自偏置N和P通道差分对，其输出端连接在一起。 自偏置有助于减少电流消耗。 N沟道和P沟道差分对的组合导致了宽范围的参考电压和电源电压的对称性。

公开(公告)号：US07459944B2

公开(公告)日：2008-12-02

申请号：US11003766

申请日：2004-12-06

Applicant: Timothy B. Cowles ,  Steve Casper

Inventor： Timothy B. Cowles ,  Steve Casper

IPC: H03K3/00

CPC classification number: H03K19/018528

Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.

Abstract translation: 公开了一种低电流输入缓冲器。 缓冲器使用自偏置N和P通道差分对，其输出端连接在一起。 自偏置有助于减少电流消耗。 N沟道和P沟道差分对的组合导致了宽范围的参考电压和电源电压的对称性。

公开(公告)号：US07327620B2

公开(公告)日：2008-02-05

申请号：US10865218

申请日：2004-06-10

Applicant: Steve Casper ,  Scott Van De Graaff

Inventor： Steve Casper ,  Scott Van De Graaff

IPC: G11C7/02

CPC classification number: H03K5/2481 ,  G01R19/16552 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/22 ,  G11C7/225 ,  G11C2207/2227 ,  H03F3/45179 ,  H03F3/72 ,  H03F2203/45592

Abstract: Disclosed herein are exemplary embodiments of an improved differential input buffer for receiving low power signals and associated methods. The disclosed buffer circuit comprises at least one differential amplifier for receiving as inputs an enable signal (e.g., a clock enable signal) and a reference signal, and provides a differential amplifier output representative of a comparison of the magnitude of the input signals. As improved, input buffer circuitry comprises a pull up stage to pull up the voltage of the differential amplifier output slightly higher during an output low condition. The pull up stage is preferably, but not necessarily, activated only during a problematic condition, such as when both input signals to the differential amplifier are low. By pulling up the output, the input buffer circuit enjoys improved margin, and is able to reliably signal a low power condition even when both inputs are low.

Abstract translation: 这里公开了用于接收低功率信号和相关方法的改进的差分输入缓冲器的示例性实施例。 所公开的缓冲电路包括至少一个差分放大器，用于接收使能信号（例如，时钟使能信号）和参考信号作为输入，并且提供代表输入信号幅度的比较的差分放大器输出。 如改进的，输入缓冲电路包括一个上拉级，以在输出低电平条件下稍微升高差分放大器输出的电压。 优选但不一定仅在有问题的状况下激活上拉电平，例如当差分放大器的两个输入信号都较低时。 通过提高输出，输入缓冲电路可以提高裕度，即使两个输入都为低电平，也能够可靠地发出低功率状态信号。

公开(公告)号：US07236019B2

公开(公告)日：2007-06-26

申请号：US11003782

申请日：2004-12-06

Applicant: Timothy B. Cowles ,  Steve Casper

Inventor： Timothy B. Cowles ,  Steve Casper

IPC: H03B1/00

CPC classification number: H03K19/018528

Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.

Abstract translation: 公开了一种低电流输入缓冲器。 缓冲器使用自偏置N和P通道差分对，其输出端连接在一起。 自偏置有助于减少电流消耗。 N沟道和P沟道差分对的组合导致了宽范围的参考电压和电源电压的对称性。

公开(公告)号：US20050099842A1

公开(公告)日：2005-05-12

申请号：US11003766

申请日：2004-12-06

Applicant: Timothy Cowles ,  Steve Casper

Inventor： Timothy Cowles ,  Steve Casper

IPC: H03K19/0185 ,  G11C11/00

CPC classification number: H03K19/018528

Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.

公开(公告)号：US08054109B2

公开(公告)日：2011-11-08

申请号：US13082514

申请日：2011-04-08

Applicant: Timothy B. Cowles ,  Steve Casper

Inventor： Timothy B. Cowles ,  Steve Casper

IPC: H03K3/00

CPC classification number: H03K19/018528

Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.

Abstract translation: 公开了一种低电流输入缓冲器。 缓冲器使用自偏置N和P通道差分对，其输出端连接在一起。 自偏置有助于减少电流消耗。 N沟道和P沟道差分对的组合导致了宽范围的参考电压和电源电压的对称性。

公开(公告)号：US20090085613A1

公开(公告)日：2009-04-02

申请号：US12268782

申请日：2008-11-11

Applicant: Timothy B. Cowles ,  Steve Casper

Inventor： Timothy B. Cowles ,  Steve Casper

IPC: H03K3/00

CPC classification number: H03K19/018528

Abstract: A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.

Abstract translation: 公开了一种低电流输入缓冲器。 缓冲器使用自偏置N和P通道差分对，其输出端连接在一起。 自偏置有助于减少电流消耗。 N沟道和P沟道差分对的组合导致了宽范围的参考电压和电源电压的对称性。