公开(公告)号：US06632745B1

公开(公告)日：2003-10-14

申请号：US10222387

申请日：2002-08-16

Applicant: Chiew Wah Yap ,  Zheng Zou ,  Eng Hua Lim ,  Nguyen Lac ,  Yelehanka Pradeep ,  Manni Lal

Inventor： Chiew Wah Yap ,  Zheng Zou ,  Eng Hua Lim ,  Nguyen Lac ,  Yelehanka Pradeep ,  Manni Lal

IPC: H01L21311

CPC classification number: H01L29/6653 ,  H01L29/665

Abstract: A patterned and etched layer of gate electrode material is formed over the active surface of a substrate, a layer of liner oxide is created, gate spacers are created. Under the first embodiment of the invention, a layer of TEOS is deposited over the created structure over which a layer of nitride is deposited, The layer of nitride is etched, this etch is extended into an overetch creating openings through the layer of TEOS where this layer overlies the gate spacers. The gate spacers are then further etched. Under the second embodiment of the invention, a layer of TEOS is deposited over the created structure. The layer of TEOS is etched, stopping on the silicon nitride of the gate spacers. The gate spacers are then further etched.

Abstract translation: 在衬底的有源表面上形成图案化和蚀刻的栅极材料层，形成衬垫氧化物层，形成栅极间隔物。在本发明的第一个实施方案中，存在一层TEOS 在其上沉积氮化物层的所产生的结构上。蚀刻氮化物层，该蚀刻扩展到通过TEOS层产生开口的过蚀刻，其中该层覆盖在栅极间隔物上。 然后进一步蚀刻栅极间隔物。在本发明的第二实施例中，在所创建的结构上沉积TEOS层。 蚀刻TEOS层，停留在栅极间隔物的氮化硅上。 然后进一步蚀刻栅极间隔物