公开(公告)号：US06289065B1

公开(公告)日：2001-09-11

申请号：US08783782

申请日：1997-01-15

Applicant: Nancy Holt ,  Stephen M. Johnson

Inventor： Nancy Holt ,  Stephen M. Johnson

IPC: H04L700

CPC classification number: G06F5/06

Abstract: The invention relates to data transfers between devices having asynchronous clocks. A FIFO having multiple levels holds the data while en route from a sender to a receiver. The invention monitors the FIFO. When all levels become full, the invention issues a FIFO_FULL signal. When all levels become empty, the invention issues a FIFO_EMPTY signal. In these signals, there are four events whose timing is important. (1) The ACTUATION of the FIFO_FULL is immediate; (2) the ACTUATION of the FIFO_EMPTY signal is immediate; (3) the DE-ACTUATION of the FIFO_FULL signal is synchronous with the clock of the computer reading the FIFO; (4) the DE-ACTUATION of the FIFO_EMPTY signal is synchronous with the clock of the computer writing to the FIFO. The invention allows throughput through the FIFO to proceed at a very high speed, even though the sender and receiver are asynchronous.

Abstract translation: 本发明涉及具有异步时钟的设备之间的数据传输。 具有多个级别的FIFO在从发送者到接收者的路由中保持数据。 本发明监控FIFO。 当所有级别变满时，本发明发出FIFO_FULL信号。 当所有级别变为空时，本发明发出FIFO_EMPTY信号。 在这些信号中，有四个事件的时机重要。 （1）FIFO_FULL的执行是立即执行的; （2）FIFO_EMPTY信号的执行是立即的; （3）FIFO_FULL信号的去激活与读取FIFO的计算机的时钟同步; （4）FIFO_EMPTY信号的执行与计算机写入FIFO的时钟同步。 本发明允许通过FIFO的吞吐量以非常高的速度进行，即使发送器和接收器是异步的。