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公开(公告)号：US20170199502A1
公开(公告)日：2017-07-13
申请号：US15324744
申请日：2015-01-22
Applicant: NR Electric Co., Ltd. , NR Electric Engineering Co., Ltd.
Inventor： Jie Tian , Lei Pan , Chao Liu , Quanrong Shen , Haiying Li , Yu Lu , Yunlong Dong
Abstract: A line power control method and system for a unified power flow controller includes outer loop line power control, inner loop valve side current control, and converter valve control. Series-side converter valve side current reference values Isedref and Iseqref are calculated by means of the outer loop line power control according to line power instructions Pref and Qref that are input, a measured line power UL, and measured line power Pline and Qline; a converter output voltage reference value Ucref is calculated by means of the inner valve side current control according to the valve side current reference values that are output by means of the outer loop power control, a measured valve side current, and a measured valve side voltage; and finally, a converter outputs, according to the voltage reference value, a corresponding voltage to control line power to achieve a reference value.
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公开(公告)号：US10250070B2
公开(公告)日：2019-04-02
申请号：US15324744
申请日：2015-01-22
Applicant: NR Electric Co., Ltd. , NR Electric Engineering Co., Ltd.
Inventor： Jie Tian , Lei Pan , Chao Liu , Quanrong Shen , Haiying Li , Yu Lu , Yunlong Dong
Abstract: A line power control method and system for a unified power flow controller includes outer loop line power control, inner loop valve side current control, and converter valve control. Series-side converter valve side current reference values Isedref and Iseqref are calculated by means of the outer loop line power control according to line power instructions Pref and Qref that are input, a measured line power UL, and measured line power Pline and Qline; a converter output voltage reference value Ucref is calculated by means of the inner valve side current control according to the valve side current reference values that are output by means of the outer loop power control, a measured valve side current, and a measured valve side voltage; and finally, a converter outputs, according to the voltage reference value, a corresponding voltage to control line power to achieve a reference value.
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公开(公告)号：US09948104B2
公开(公告)日：2018-04-17
申请号：US15111216
申请日：2015-01-22
Applicant: NR ELECTRIC CO., LTD. , NR ELECTRIC ENGINEERING CO., LTD.
Inventor： Ming Hu , Zhenxia Shao , Xinyan Jiao , Jie Tian , Yu Lu , Gang Shen
CPC classification number: H02J3/36 , H02J1/08 , H02M5/4585 , Y02E60/60
Abstract: A tripolar VSC-HVDC system and method include a rectifier and an inverter formed by a three-phase six-bridge arms modular multilevel converter (MMC) respectively, and two converter valves are arranged on the DC side of the rectifier and inverter respectively. The midpoint of upper and lower converter valves of the rectifier and inverter are connected with a pole 3 DC line by a smoothing reactor. Triggering of the upper and lower converter valves is controlled to change the DC voltage polarity of the pole 3 periodically, and tripolar DC transmission is realized by modulating current orders of the three poles.
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公开(公告)号：US20170098936A1
公开(公告)日：2017-04-06
申请号：US15311540
申请日：2015-01-12
Applicant: NR ELECTRIC CO., LTD. , NR ELECTRIC ENGINEERING CO., LTD.
Inventor： Jie Tian , Haiying Li , Xinbao Wang , Yunlong Dong , Quanrong Shen , Lei Pan , Chao Liu , Baoli Chang
CPC classification number: H02J3/14 , H02J3/16 , H02J3/1814 , H02J3/46 , Y02E40/18
Abstract: A unified power flow controller for a double-circuit transmission line comprises at least one parallel-connection transformer, three current converters, at least two series-connection transformers, a parallel-connection side switching circuit, a series-connection side switching circuit and a direct current common bus. The series-connection transformers connected with at least one group of by-pass switches in parallel. The three current converters connected to each loop line in series after being connected with at least one series-connection transformer through the series-connection side switching circuit. The three current converters connected to an alternating current system after connected with at least one parallel-connection transformer through a parallel-connection side switching circuit starting circuit. The three current converters are connected to the direct current common bus through a transfer switch.
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5.发明申请METHOD AND APPARATUS FOR AUTOMATIC SIGNAL EXCHANGE BETWEEN MULTIPLE EMBEDDED CPU BOARDS 有权用于多个嵌入式CPU板之间的自动信号交换的方法和装置公开(公告)号：US20170075836A1
公开(公告)日：2017-03-16
申请号：US15039254
申请日：2014-11-12
Applicant: NR ELECTRIC CO., LTD. , NR ELECTRIC ENGINEERING CO., LTD.
Inventor： Yadong Feng , Qiang Zhou , Dongfang Xu , Tao Yuan , Tianen Zhao , Guanghua Li , Jifeng Wen , Hongjun Chen , Kejin Liu
IPC: G06F13/362 , G06F13/42
CPC classification number: G06F13/362 , G06F13/4282 , G06F15/17 , G06F17/50
Abstract: A signal name based method for automatic signal exchange between multiple embedded CPU boards, includes: dividing CPU boards into master board and slave board, where each slave board sends signal registration information to the master board; reading an exchange relationship between an output signal and an input signal that is represented by a connection line between signal names, calculating and allocating a data bus address to which the output signal and the input signal are mapped, and sending memory addresses, data types, and bus addresses of signals to each slave board; saving these as output signal tables and input signal tables; and writing, by a signal sender, a value of an output signal into a corresponding bus address according to the output signal tables, and reading, by a receiver, a value of an input signal from a corresponding bus address according to the input signal tables.
Abstract translation: 一种基于信号名称的多个嵌入式CPU板之间自动信号交换的方法，包括：将CPU板分为主板和从机板，每个从机板向主板发送信号注册信息; 读取由信号名称之间的连接线表示的输出信号和输入信号之间的交换关系，计算并分配映射了输出信号和输入信号的数据总线地址，并发送存储器地址，数据类型， 和每个从单板的信号总线地址; 保存为输出信号表和输入信号表; 并且由信号发送器根据输出信号表将输出信号的值写入对应的总线地址，并且由接收器根据输入信号表从相应的总线地址读取输入信号的值 。
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Patent Agency Ranking
公开(公告)号：US10128650B2
公开(公告)日：2018-11-13
申请号：US15305183
申请日：2015-01-08
Applicant: NR ELECTRIC CO., LTD. , NR ELECTRIC ENGINEERING CO., LTD.
Inventor： Qixue Zhang , Baoli Xu , Jie Zhang , Huazhong Li , Yaoyao Ji , Shouping Zhong , Guang Wang , Jun Chen , Wei Yan
IPC: H02H7/00 , H02H7/20 , H02H7/04 , H02H7/16 , H02H3/04 , H02H3/52 , H02H7/06 , H02H7/26 , H02J1/02 , H02J3/24 , H02J3/36 , H02J3/01
Abstract: A relay protection method against LC parallel circuit detuning faults comprises the steps of: a relay protection device samples a current of a parallel LC, that is, a reactor and a capacitor, and samples a total current flowing through the whole LC; convert the current of the reactor into a current of an equivalent capacitor; calculate amplitudes of the current of the equivalent capacitor and a current of a realistic capacitor and calculate an amplitude of the total current flowing through the LC; calculate a current amplitude ratio of the equivalent capacitor to the realistic capacitor; and when the amplitude of the total current flowing through the LC is large enough, send an alarm signal or a trip after a setting time delay if the current ratio exceeds a preset upper and lower limit range. Also provided is a corresponding relay protection device.
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公开(公告)号：US09768696B2
公开(公告)日：2017-09-19
申请号：US15116877
申请日：2015-01-22
Applicant: NR Electric Co., Ltd. , NR Electric Engineering Co., Ltd.
Inventor： Wenqiang Zhao , Lin Li , Yongping Wang
CPC classification number: H02M3/24 , H02J3/36 , H02M5/42 , H02M5/45 , H02M5/451 , H02M5/458 , H02M7/7575 , Y02E60/60
Abstract: A high voltage/ultrahigh voltage direct current transmission inverter side frequency control implementing method includes: transmitting a deviation between the inverter side power grid frequency and rated frequency to the inverter side frequency controller, wherein the frequency controller regulates and outputs a modulation quantity by adopting self-adaptive parameters according to different operation conditions; when the interstation communication is normal, the modulation quantity output of the inverter side frequency controller causes the rectifier side and the inverter side to form a new power/current order through the interstation communication; when the interstation communication is abnormal, converting the inverter side to current control from voltage control and converting the rectifier side to voltage control from current control; superposing the modulation quantity output of the inverter side frequency controller to the power/current order of the inverter side, changing the size of the transmission power to realizing the inverter side frequency control.
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公开(公告)号：US20170163158A1
公开(公告)日：2017-06-08
申请号：US15116877
申请日：2015-01-22
Applicant: NR Electric Co., Ltd. , NR Electric Engineering Co., Ltd.
Inventor： Wenqiang Zhao , Lin Li , Yongping Wang
IPC: H02M3/24
CPC classification number: H02M3/24 , H02J3/36 , H02M5/42 , H02M5/45 , H02M5/451 , H02M5/458 , H02M7/7575 , Y02E60/60
Abstract: A high voltage/ultrahigh voltage direct current transmission inverter side frequency control implementing method includes: transmitting a deviation between the inverter side power grid frequency and rated frequency to the inverter side frequency controller, wherein the frequency controller regulates and outputs a modulation quantity by adopting self-adaptive parameters according to different operation conditions; when the interstation communication is normal, the modulation quantity output of the inverter side frequency controller causes the rectifier side and the inverter side to form a new power/current order through the interstation communication; when the interstation communication is abnormal, converting the inverter side to current control from voltage control and converting the rectifier side to voltage control from current control; superposing the modulation quantity output of the inverter side frequency controller to the power/current order of the inverter side, changing the size of the transmission power to realizing the inverter side frequency control.
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公开(公告)号：US10033186B2
公开(公告)日：2018-07-24
申请号：US15311540
申请日：2015-01-12
Applicant: NR ELECTRIC CO., LTD. , NR ELECTRIC ENGINEERING CO., LTD.
Inventor： Jie Tian , Haiying Li , Xinbao Wang , Yunlong Dong , Quanrong Shen , Lei Pan , Chao Liu , Baoli Chang
Abstract: A unified power flow controller for a double-circuit transmission line comprises at least one parallel-connection transformer, three current converters, at least two series-connection transformers, a parallel-connection side switching circuit, a series-connection side switching circuit and a direct current common bus. The series-connection transformers connected with at least one group of by-pass switches in parallel. The three current converters connected to each loop line in series after being connected with at least one series-connection transformer through the series-connection side switching circuit. The three current converters connected to an alternating current system after connected with at least one parallel-connection transformer through a parallel-connection side switching circuit starting circuit. The three current converters are connected to the direct current common bus through a transfer switch.
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公开(公告)号：US10007627B2
公开(公告)日：2018-06-26
申请号：US15039254
申请日：2014-11-12
Applicant: NR ELECTRIC CO., LTD. , NR ELECTRIC ENGINEERING CO., LTD.
Inventor： Yadong Feng , Qiang Zhou , Dongfang Xu , Tao Yuan , Tianen Zhao , Guanghua Li , Jifeng Wen , Hongjun Chen , Kejin Liu
IPC: G06F13/00 , G06F13/362 , G06F15/17 , G06F13/42 , G06F17/50
CPC classification number: G06F13/362 , G06F13/4282 , G06F15/17 , G06F17/50
Abstract: A signal name based method for automatic signal exchange between multiple embedded CPU boards, includes: dividing CPU boards into master board and slave board, where each slave board sends signal registration information to the master board; reading an exchange relationship between an output signal and an input signal that is represented by a connection line between signal names, calculating and allocating a data bus address to which the output signal and the input signal are mapped, and sending memory addresses, data types, and bus addresses of signals to each slave board; saving these as output signal tables and input signal tables; and writing, by a signal sender, a value of an output signal into a corresponding bus address according to the output signal tables, and reading, by a receiver, a value of an input signal from a corresponding bus address according to the input signal tables.
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