公开(公告)号：US08509456B2

公开(公告)日：2013-08-13

申请号：US12878411

申请日：2010-09-09

申请人： Moto Yamada

发明人： Moto Yamada

IPC分类号： H03G9/00 ,  H03G3/00 ,  H04B15/00

CPC分类号： H03G9/025

摘要： A circuit configured to adjust the level of an audio signal includes filters each of which is configured to receive an audio signal, and to pass a band set for the filter. Variable gain amplifiers are severally provided to the respective filters, and each variable gain amplifier amplifies the output signal of the corresponding filter. An adder sums the input audio signal and the output signals of the variable gain amplifiers. A control unit controls the level of the output signal of each of the variable gain amplifiers, and controls the gain of each variable gain amplifier according to the level thus monitored.

摘要翻译： 配置为调整音频信号的电平的电路包括滤波器，每个滤波器被配置为接收音频信号，并且传递用于滤波器的频带组。 可变增益放大器分别提供给各个滤波器，并且每个可变增益放大器放大相应滤波器的输出信号。 加法器将输入音频信号和可变增益放大器的输出信号相加。 控制单元控制每个可变增益放大器的输出信号的电平，并且根据如此监视的电平来控制每个可变增益放大器的增益。

公开(公告)号：US20090092204A1

公开(公告)日：2009-04-09

申请号：US12194109

申请日：2008-08-19

申请人： Moto YAMADA

发明人： Moto YAMADA

IPC分类号： H04L27/22

CPC分类号： H04L27/16 ,  H04L2027/0065 ,  H04L2027/0095

摘要： A carrier offset detection circuit is offered, which is provided to a demodulation circuit which demodulates a received signal subjected to FSK (Frequency Shift Keying) modulation, and which detects the offset of the carrier frequency between the transmitting side and the receiving side. A zero-crossing detection unit receives a digital base band signal indicating the level of the frequency shift (frequency deviation) of the received signal using the carrier frequency on the receiving side as a reference frequency, and detects a zero-crossing point of the base band signal and a base band signal obtained by delaying the former base band signal by one symbol, which occurs in a preamble period. A carrier offset detection circuit sets the offset value of the carrier frequency to the value of the base band signal at a timing of the zero-crossing point thus detected.

摘要翻译： 提供载波偏移检测电路，其被提供给解调电路，该解调电路对经受FSK（频移键控）调制的接收信号进行解调，并且检测发送侧和接收侧之间的载波频率的偏移。 过零检测单元使用接收侧的载波频率作为基准频率接收表示接收信号的频移（频率偏移）的电平的数字基带信号，并检测基地的过零点 并且通过将前一基带信号延迟一个符号而获得的基带信号，其在前导码周期中发生。 载波偏移检测电路在由此检测的过零点的定时将载波频率的偏移值设置为基带信号的值。

公开(公告)号：US08325946B2

公开(公告)日：2012-12-04

申请号：US12702414

申请日：2010-02-09

申请人： Mitsuteru Sakai ,  Moto Yamada ,  Takahiro Ogi ,  Yosuke Sato ,  Makoto Nakamura

发明人： Mitsuteru Sakai ,  Moto Yamada ,  Takahiro Ogi ,  Yosuke Sato ,  Makoto Nakamura

IPC分类号： H03F99/00 ,  H02B1/00

CPC分类号： H03K17/005 ,  H03F3/45475 ,  H03F3/68 ,  H03F3/72 ,  H03F2203/45138 ,  H03G1/0088

摘要： A first selector receives a second input signal and a second reference voltage, and selects either one. A first buffer receives the output signal of the first selector, and outputs the signal thus received to a terminal of the first resistor, and to a terminal of the third resistor. A second selector receives a first input signal and a third input signal, and selects either one. A fourth selector receives, as input signals, the output signal of an operational amplifier, a signal that corresponds to the output signal of the second selector, and a signal that corresponds to the second input signal, and selects one signal selected from among the signals thus received.

摘要翻译： 第一选择器接收第二输入信号和第二参考电压，并选择任一个。 第一缓冲器接收第一选择器的输出信号，并将如此接收的信号输出到第一电阻器的端子，并输出到第三电阻器的端子。 第二选择器接收第一输入信号和第三输入信号，并选择任一个。 第四选择器作为输入信号接收运算放大器的输出信号，对应于第二选择器的输出信号的信号和对应于第二输入信号的信号，并选择从信号中选出的一个信号 从而得到。

公开(公告)号：US08199860B2

公开(公告)日：2012-06-12

申请号：US12194109

申请日：2008-08-19

申请人： Moto Yamada

发明人： Moto Yamada

IPC分类号： H04L27/00

CPC分类号： H04L27/16 ,  H04L2027/0065 ,  H04L2027/0095

摘要： A carrier offset detection circuit is offered, which is provided to a demodulation circuit which demodulates a received signal subjected to FSK (Frequency Shift Keying) modulation, and which detects the offset of the carrier frequency between the transmitting side and the receiving side. A zero-crossing detection unit receives a digital base band signal indicating the level of the frequency shift (frequency deviation) of the received signal using the carrier frequency on the receiving side as a reference frequency, and detects a zero-crossing point of the base band signal and a base band signal obtained by delaying the former base band signal by one symbol, which occurs in a preamble period. A carrier offset detection circuit sets the offset value of the carrier frequency to the value of the base band signal at a timing of the zero-crossing point thus detected.

摘要翻译： 提供载波偏移检测电路，其被提供给解调电路，该解调电路对经受FSK（频移键控）调制的接收信号进行解调，并且检测发送侧和接收侧之间的载波频率的偏移。 过零检测单元使用接收侧的载波频率作为基准频率接收表示接收信号的频移（频率偏移）的电平的数字基带信号，并检测基地的过零点 并且通过将前一基带信号延迟一个符号而获得的基带信号，其在前导码周期中发生。 载波偏移检测电路在由此检测的过零点的定时将载波频率的偏移值设置为基带信号的值。

公开(公告)号：US20110200209A1

公开(公告)日：2011-08-18

申请号：US12878411

申请日：2010-09-09

申请人： Moto YAMADA

发明人： Moto YAMADA

IPC分类号： H03G9/00

CPC分类号： H03G9/025

摘要： A circuit configured to adjust the level of an audio signal includes filters each of which is configured to receive an audio signal, and to pass a band set for the filter. Variable gain amplifiers are severally provided to the respective filters, and each variable gain amplifier amplifies the output signal of the corresponding filter. An adder sums the input audio signal and the output signals of the variable gain amplifiers. A control unit controls the level of the output signal of each of the variable gain amplifiers, and controls the gain of each variable gain amplifier according to the level thus monitored.

摘要翻译： 配置为调整音频信号的电平的电路包括滤波器，每个滤波器被配置为接收音频信号，并且通过用于滤波器的频带组。 可变增益放大器分别提供给各个滤波器，并且每个可变增益放大器放大相应滤波器的输出信号。 加法器将输入音频信号和可变增益放大器的输出信号相加。 控制单元控制每个可变增益放大器的输出信号的电平，并且根据如此监视的电平来控制每个可变增益放大器的增益。

公开(公告)号：US20100220874A1

公开(公告)日：2010-09-02

申请号：US12702414

申请日：2010-02-09

申请人： Mitsuteru SAKAI ,  Moto YAMADA ,  Takahiro OGI ,  Yosuke SATO ,  Makoto NAKAMURA

发明人： Mitsuteru SAKAI ,  Moto YAMADA ,  Takahiro OGI ,  Yosuke SATO ,  Makoto NAKAMURA

IPC分类号： H03F99/00 ,  H02B1/00

CPC分类号： H03K17/005 ,  H03F3/45475 ,  H03F3/68 ,  H03F3/72 ,  H03F2203/45138 ,  H03G1/0088

摘要： A first selector receives a second input signal and a second reference voltage, and selects either one. A first buffer receives the output signal of the first selector, and outputs the signal thus received to a terminal of the first resistor, and to a terminal of the third resistor. A second selector receives a first input signal and a third input signal, and selects either one. A fourth selector receives, as input signals, the output signal of an operational amplifier, a signal that corresponds to the output signal of the second selector, and a signal that corresponds to the second input signal, and selects one signal selected from among the signals thus received.

摘要翻译： 第一选择器接收第二输入信号和第二参考电压，并选择任一个。 第一缓冲器接收第一选择器的输出信号，并将如此接收的信号输出到第一电阻器的端子，并输出到第三电阻器的端子。 第二选择器接收第一输入信号和第三输入信号，并选择任一个。 第四选择器作为输入信号接收运算放大器的输出信号，对应于第二选择器的输出信号的信号和对应于第二输入信号的信号，并选择从信号中选出的一个信号 从而得到。