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    SOLID ELECTROLYTIC CAPACITOR AND CIRCUIT BOARD HAVING THE SAME
    2.
    发明申请
    SOLID ELECTROLYTIC CAPACITOR AND CIRCUIT BOARD HAVING THE SAME 有权
    固体电解电容器和具有该电容器的电路板

    公开(公告)号：US20130233605A1

    公开(公告)日：2013-09-12

    申请号：US13607820

    申请日：2012-09-10

    申请人： Chien-Min Hsu ,  Min-Lin Lee ,  Li-Duan Tsai

    发明人： Chien-Min Hsu ,  Min-Lin Lee ,  Li-Duan Tsai

    IPC分类号： H05K1/18

    CPC分类号： H05K1/162 ,  H01G9/012 ,  H01G9/04 ,  H01G9/15 ,  H01G9/26 ,  H05K1/0231 ,  H05K1/053 ,  H05K2201/0116 ,  H05K2201/0175 ,  H05K2201/0191 ,  H05K2201/0323 ,  H05K2201/0329 ,  H05K2201/0338 ,  H05K2201/09063 ,  H05K2201/10522 ,  H05K2203/0307 ,  H05K2203/0315 ,  H05K2203/0369 ,  H05K2203/0723

    摘要： A capacitor and a circuit board having the same are provided. The capacitor includes a substrate, an oxide layer, a second electrode, an insulating layer, a plurality of conductive sheets and a plurality of vias. The substrate includes a first electrode and a porous structure. The porous structure in at least of two distribution regions has different depths. An oxide layer is disposed on the surface of the porous structure. The second electrode is disposed on the oxide layer and includes a conductive polymer material. The insulating layer disposed on the second electrode has a third and a fourth surfaces. The fourth surface of the insulating layer is connected with the second electrode. The conductive sheets are disposed on the first surface of the first electrode and the third surface of the insulating layer and electrically connected with the corresponding vias according to different polarities.

    摘要翻译： 提供电容器和具有该电容器的电路板。 电容器包括衬底，氧化物层，第二电极，绝缘层，多个导电片和多个通孔。 基板包括第一电极和多孔结构。 至少两个分布区域中的多孔结构具有不同的深度。 氧化物层设置在多孔结构的表面上。 第二电极设置在氧化物层上并且包括导电聚合物材料。 设置在第二电极上的绝缘层具有第三和第四表面。 绝缘层的第四表面与第二电极连接。 导电片设置在第一电极的第一表面和绝缘层的第三表面上，并根据不同的极性与相应的通孔电连接。

    Decoupling device
    3.
    发明授权
    Decoupling device 有权
    去耦装置

    公开(公告)号：US08289679B2

    公开(公告)日：2012-10-16

    申请号：US12776442

    申请日：2010-05-10

    申请人： Cheng-Liang Cheng ,  Chi-Lun Chen ,  Li-Duan Tsai ,  Min-Lin Lee ,  Shur-Fen Liu

    发明人： Cheng-Liang Cheng ,  Chi-Lun Chen ,  Li-Duan Tsai ,  Min-Lin Lee ,  Shur-Fen Liu

    IPC分类号： H01G5/38 ,  H01G9/00

    CPC分类号： H01G9/15 ,  H01G9/008 ,  H01G9/28

    摘要： A decoupling device includes a lead frame, a capacitor unit, a metal layer, and a high dielectric organic-inorganic composite material layer. The lead frame includes a cathode terminal portion and an anode terminal portion. The capacitor unit is disposed on the lead frame. The capacitor unit includes a cathode portion, an anode portion, and an insulation portion located between the cathode portion and the anode portion. The cathode portion is electrically connected to the cathode terminal portion, and the anode portion is electrically connected to the anode terminal portion. The high dielectric organic-inorganic composite material layer is connected to the capacitor unit in parallel via the metal layer.

    摘要翻译： 解耦装置包括引线框架，电容器单元，金属层和高介电有机 - 无机复合材料层。 引线框架包括阴极端子部分和阳极端子部分。 电容器单元设置在引线框架上。 电容器单元包括阴极部分，阳极部分和位于阴极部分和阳极部分之间的绝缘部分。 阴极部分电连接到阴极端子部分，并且阳极部分电连接到阳极端子部分。 高介电有机 - 无机复合材料层通过金属层并联连接到电容器单元。

    Electrically conductive structure of circuit board and circuit board using the same
    5.
    发明授权
    Electrically conductive structure of circuit board and circuit board using the same 有权
    导电结构的电路板和电路板使用相同

    公开(公告)号：US08071890B2

    公开(公告)日：2011-12-06

    申请号：US12181330

    申请日：2008-07-29

    申请人： Chien-Min Hsu ,  Shih-Hsien Wu ,  Shinn-Juh Lai ,  Min-Lin Lee

    发明人： Chien-Min Hsu ,  Shih-Hsien Wu ,  Shinn-Juh Lai ,  Min-Lin Lee

    IPC分类号： H05K1/16

    CPC分类号： H05K1/112 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H05K1/0228 ,  H05K1/0231 ,  H05K1/0263 ,  H05K1/162 ,  H05K1/185 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/09245 ,  H05K2201/09627 ,  H05K2201/09709 ,  H05K2201/10734 ,  H01L2224/05599

    摘要： An electrically conductive structure includes a first conductive structure and a second conductive structure. Each has a conducting section at one end and a coupling section at the other end. The first and second conducting sections are electrically connected to a power and ground contact of an electronic device, respectively. The first and second coupling sections are respectively connected with power and ground layer of a circuit board. The first coupling sections are connected with the first conducting section through first extending sections and the second coupling sections are connected with the second conducting section through second extending sections. At least two coupling sections of the conductive structures are arranged in pairs. The first conductive structure and the second conductive structure are arranged in a staggered array to form two wiring loops having opposite current directions, thereby generating a magnetic flux cancellation effect.

    摘要翻译： 导电结构包括第一导电结构和第二导电结构。 每个在一端具有导电部分，另一端具有耦合部分。 第一和第二导电部分分别电连接到电子设备的电源和接地触点。 第一和第二耦合部分分别与电路板的电源层和接地层连接。 第一耦合部分通过第一延伸部分与第一导电部分连接，第二耦合部分通过第二延伸部分与第二导电部分连接。 导电结构的至少两个耦合部分成对布置。 第一导电结构和第二导电结构以交错阵列布置以形成具有相反电流方向的两个布线环，从而产生磁通消除效果。

    MULTILAYER CAPACITORS AND METHODS FOR MAKING THE SAME
    6.
    发明申请
    MULTILAYER CAPACITORS AND METHODS FOR MAKING THE SAME 有权
    多层电容器及其制造方法

    公开(公告)号：US20100321858A1

    公开(公告)日：2010-12-23

    申请号：US12488780

    申请日：2009-06-22

    申请人： Chien-Min Hsu ,  Min-Lin Lee ,  Shinn-Juh Lai

    发明人： Chien-Min Hsu ,  Min-Lin Lee ,  Shinn-Juh Lai

    IPC分类号： H01G4/30 ,  H01G7/00

    CPC分类号： H05K1/162 ,  H01G4/1209 ,  H01G4/232 ,  H01G4/30 ,  H01G4/35 ,  H01L28/86 ,  H05K3/429 ,  H05K2201/0187 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/09672 ,  H05K2201/09718 ,  Y10T29/43

    摘要： A capacitor device may include a first electrode, a second electrode, a third electrode, a first dielectric layer, and a second dielectric layer. The first electrode may be coupled with a first terminal of the capacitor device. The second electrode is under the first electrode and may be coupled with a second terminal of the capacitor device. The second electrode may be electrically isolated from the first electrode. The third electrode is under the first electrode and the second electrode and may be electrically isolated from the second electrode and electrically coupled with the first electrode. The first dielectric layer has a first dielectric constant and may be sandwiched between the first electrode and the second electrode. The second dielectric layer may have a second dielectric constant and may be sandwiched between the second electrode and the third electrode. In one embodiment, the second dielectric constant is at least five times larger than the first dielectric constant.

    摘要翻译： 电容器装置可以包括第一电极，第二电极，第三电极，第一电介质层和第二电介质层。 第一电极可以与电容器装置的第一端子耦合。 第二电极位于第一电极下方并且可以与电容器装置的第二端子耦合。 第二电极可以与第一电极电隔离。 第三电极在第一电极和第二电极之下，并且可以与第二电极电隔离并与第一电极电耦合。 第一电介质层具有第一介电常数并且可夹在第一电极和第二电极之间。 第二电介质层可以具有第二介电常数并且可以夹在第二电极和第三电极之间。 在一个实施例中，第二介电常数比第一介电常数大至少五倍。

    MIRROR IMAGE SHIELDING STRUCTURE
    7.
    发明申请
    MIRROR IMAGE SHIELDING STRUCTURE 有权
    镜像图像屏蔽结构

    公开(公告)号：US20100226112A1

    公开(公告)日：2010-09-09

    申请号：US12783478

    申请日：2010-05-19

    申请人： Uei-Ming Jow ,  Chin-Sun Shyu ,  Chang-Sheng Chen ,  Min-Lin Lee ,  Shinn-Juh Lai

    发明人： Uei-Ming Jow ,  Chin-Sun Shyu ,  Chang-Sheng Chen ,  Min-Lin Lee ,  Shinn-Juh Lai

    IPC分类号： H05K9/00

    CPC分类号： H05K1/0218 ,  H05K1/0224 ,  H05K1/0237 ,  H05K1/025 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K2201/0792 ,  H05K2201/09672

    摘要： A mirror image shielding structure is provided, which includes an electronic element and a ground shielding plane below the electronic element. The shape of the ground shielding plane is identical to the projection shape of the electronic element, and the horizontal size of the ground shielding plane is greater than or equal to that of the electronic element. Thus, the parasitic effect between the electronic element and the ground shielding plane is effectively reduced, and the vertical coupling effect between electronic elements is also reduced. Furthermore, the vertical impact on the signal integrity of the embedded elements caused by the layout of the transmission lines is prevented.

    摘要翻译： 提供一种镜像屏蔽结构，其包括电子元件和电子元件下方的接地屏蔽平面。 接地屏蔽面的形状与电子元件的突出形状相同，接地屏蔽面的水平尺寸大于或等于电子元件的尺寸。 因此，有效地减小了电子元件与接地屏蔽层之间的寄生效应，并且电子元件之间的垂直耦合效应也降低。 此外，防止了由传输线的布局引起的对嵌入元件的信号完整性的垂直影响。

    Mirror image shielding structure
    8.
    发明授权
    Mirror image shielding structure 有权
    镜像屏蔽结构

    公开(公告)号：US07764512B2

    公开(公告)日：2010-07-27

    申请号：US11451292

    申请日：2006-06-12

    申请人： Uei-Ming Jow ,  Chin-Sun Shyu ,  Chang-Sheng Chen ,  Min-Lin Lee ,  Shinn-Juh Lai

    发明人： Uei-Ming Jow ,  Chin-Sun Shyu ,  Chang-Sheng Chen ,  Min-Lin Lee ,  Shinn-Juh Lai

    IPC分类号： H05K7/18

    CPC分类号： H05K1/0218 ,  H05K1/0224 ,  H05K1/0237 ,  H05K1/025 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K2201/0792 ,  H05K2201/09672

    摘要： A mirror image shielding structure is provided, which includes an electronic element and a ground shielding plane below the electronic element. The shape of the ground shielding plane is identical to the projection shape of the electronic element, and the horizontal size of the ground shielding plane is greater than or equal to that of the electronic element. Thus, the parasitic effect between the electronic element and the ground shielding plane is effectively reduced, and the vertical coupling effect between electronic elements is also reduced. Furthermore, the vertical impact on the signal integrity of the embedded elements caused by the layout of the transmission lines is prevented.

    摘要翻译： 提供一种镜像屏蔽结构，其包括电子元件和电子元件下方的接地屏蔽平面。 接地屏蔽面的形状与电子元件的突出形状相同，接地屏蔽面的水平尺寸大于或等于电子元件的尺寸。 因此，有效地减小了电子元件与接地屏蔽层之间的寄生效应，并且电子元件之间的垂直耦合效应也降低。 此外，防止了由传输线的布局引起的对嵌入元件的信号完整性的垂直影响。

    Wiring structure of laminated capacitors
    9.
    发明授权
    Wiring structure of laminated capacitors 有权
    层压电容器的接线结构

    公开(公告)号：US07742276B2

    公开(公告)日：2010-06-22

    申请号：US11950381

    申请日：2007-12-04

    申请人： Chien-Min Hsu ,  Shih-Hsien Wu ,  Min-Lin Lee ,  Shinn-Juh Lai

    发明人： Chien-Min Hsu ,  Shih-Hsien Wu ,  Min-Lin Lee ,  Shinn-Juh Lai

    IPC分类号： H01G4/228

    CPC分类号： H05K1/162 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H05K1/112 ,  H05K3/429 ,  H05K3/4688 ,  H05K2201/0792 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/09636 ,  H05K2201/10734 ,  H01L2224/0401

    摘要： The present invention relates to a wiring structure for reducing the equivalent series inductance (ESL) of a laminated capacitor. The laminated capacitor comprises a number of conductive layers, a power via extending along a thickness direction of the laminated capacitor and arranged to extend from the top conductive layer to the bottom conductive layer, and a ground via extending along the thickness direction of the laminated capacitor and arranged to extend from the top conductive layer to the bottom conductive layer. The conductive layers include a set of first conductive layers and a set of second conductive layers. The power via is electrically coupled to the first conductive layers and the ground via is electrically coupled to the second conductive layers. The laminated capacitor further comprises a supplemental via between the power via and the ground via. The supplemental via is shorter in length than the power via and the ground via. The supplemental via is electrically coupled to one of the first conductive layers and the second conductive layer.

    摘要翻译： 本发明涉及一种用于降低层叠电容器的等效串联电感（ESL）的布线结构。 层叠电容器包括多个导电层，沿层叠电容器的厚度方向延伸的电力通孔，并且从顶部导电层延伸至底部导电层，沿着层叠电容器的厚度方向延伸的接地通孔 并布置成从顶部导电层延伸到底部导电层。 导电层包括一组第一导电层和一组第二导电层。 电源通孔电耦合到第一导电层，并且接地通孔电耦合到第二导电层。 层叠电容器还包括电源通孔和接地通孔之间的补充通路。 补充通孔的长度要短于电源通孔和接地通孔。 辅助通孔电耦合到第一导电层和第二导电层之一。