Method for performing high resolution phase alignment of multiple clocks using low resolution converters
    1.
    发明申请
    Method for performing high resolution phase alignment of multiple clocks using low resolution converters 有权
    使用低分辨率转换器执行多个时钟的高分辨率相位对准的方法

    公开(公告)号:US20060222127A1

    公开(公告)日:2006-10-05

    申请号:US11395590

    申请日:2006-03-30

    IPC分类号: H04L7/00

    CPC分类号: H03L7/091 H04L7/033

    摘要: The offset between a reference clock output signal and a target clock output signal are measured during a predetermined period. Based on the measurement, an offset signal is generated. The offset signal is integrated into an average offset signal value, wherein the period of integration is the predetermined phase measurement time. The target clock is adjusted based on the average offset signal value so that the offset signal magnitude value approaches a predetermined limit. The process is iterated until the clocks are aligned within a predetermined tolerance. A tristatable XOR device may be used to measure phase difference, a simple RC circuit may be used to integrate the measured phase difference offset signal into the average offset signal and a low resolution A/D converter to digitize the average offset signal, before feeding the average offset signal value to the target clock.

    摘要翻译: 在预定周期内测量参考时钟输出信号和目标时钟输出信号之间的偏移。 基于测量,产生偏移信号。 偏移信号被积分成平均偏移信号值,其中积分周期是预定的相位测量时间。 基于平均偏移信号值调整目标时钟,使得偏移信号幅度值接近预定极限。 重复该过程,直到时钟在预定公差内对齐。 可以使用三态XOR装置来测量相位差,可以使用简单的RC电路将测量的相位差偏移信号整合到平均偏移信号中,并且可以使用低分辨率A / D转换器来在馈送之前对平均偏移信号进行数字化 平均偏移信号值到目标时钟。

    Method for performing high resolution phase alignment of multiple clocks using low resolution converters
    2.
    发明授权
    Method for performing high resolution phase alignment of multiple clocks using low resolution converters 有权
    使用低分辨率转换器执行多个时钟的高分辨率相位对准的方法

    公开(公告)号:US07593495B2

    公开(公告)日:2009-09-22

    申请号:US11395590

    申请日:2006-03-30

    IPC分类号: H04L7/00

    CPC分类号: H03L7/091 H04L7/033

    摘要: The offset between a reference clock output signal and a target clock output signal are measured during a predetermined period. Based on the measurement, an offset signal is generated. The offset signal is integrated into an average offset signal value, wherein the period of integration is the predetermined phase measurement time. The target clock is adjusted based on the average offset signal value so that the offset signal magnitude value approaches a predetermined limit. The process is iterated until the clocks are aligned within a predetermined tolerance.

    摘要翻译: 在预定周期内测量参考时钟输出信号和目标时钟输出信号之间的偏移。 基于测量,产生偏移信号。 偏移信号被积分成平均偏移信号值,其中积分周期是预定的相位测量时间。 基于平均偏移信号值调整目标时钟,使得偏移信号幅度值接近预定极限。 重复该过程,直到时钟在预定公差内对齐。