摘要:
The offset between a reference clock output signal and a target clock output signal are measured during a predetermined period. Based on the measurement, an offset signal is generated. The offset signal is integrated into an average offset signal value, wherein the period of integration is the predetermined phase measurement time. The target clock is adjusted based on the average offset signal value so that the offset signal magnitude value approaches a predetermined limit. The process is iterated until the clocks are aligned within a predetermined tolerance. A tristatable XOR device may be used to measure phase difference, a simple RC circuit may be used to integrate the measured phase difference offset signal into the average offset signal and a low resolution A/D converter to digitize the average offset signal, before feeding the average offset signal value to the target clock.
摘要:
The offset between a reference clock output signal and a target clock output signal are measured during a predetermined period. Based on the measurement, an offset signal is generated. The offset signal is integrated into an average offset signal value, wherein the period of integration is the predetermined phase measurement time. The target clock is adjusted based on the average offset signal value so that the offset signal magnitude value approaches a predetermined limit. The process is iterated until the clocks are aligned within a predetermined tolerance.