公开(公告)号：US20080036749A1

公开(公告)日：2008-02-14

申请号：US11819582

申请日：2007-06-28

Applicant: Seiichi Moriyama ,  Mamoru Seike ,  Jyunichi Suenaga

Inventor： Seiichi Moriyama ,  Mamoru Seike ,  Jyunichi Suenaga

IPC: G09G5/00 ,  G06F3/038

CPC classification number: G09G3/288 ,  G06F3/0412 ,  G06F3/044 ,  G09G3/2092 ,  G09G3/2096 ,  G09G3/3688 ,  G09G2310/0221 ,  G09G2310/0248 ,  G09G2310/0251 ,  G09G2310/0275 ,  G09G2330/02

Abstract: A display driver includes: a first memory circuit for storing a line of pixels constituting an image; a second memory circuit for storing pixels of the immediately previous line; an output terminal pair switch circuit which outputs voltages each corresponding to a value of a pixel stored in the first memory circuit to a plurality of output terminals respectively corresponding to the pixels; and an inter-terminal load determination circuit for determining, for every pair of selected columns of pixels constituting the image, whether or not a short circuit is to be established between two of the plurality of output terminals which respectively correspond to the two selected columns based on values of at least three out of four pixels belonging to the two selected columns which are stored in the first and second memory circuits. If the inter-terminal load determination circuit determines that a short circuit is to be established, the output terminal pair switch circuit temporarily establishes a short circuit between the two output terminals before the voltages corresponding to the values of the pixels are output to the two output terminals.

Abstract translation: 显示驱动器包括：第一存储器电路，用于存储构成图像的一行像素; 第二存储器电路，用于存储紧接在前一行的像素; 输出端子对开关电路，其将分别对应于存储在第一存储器电路中的像素的电压的电压分别输出到分别对应于像素的多个输出端子; 以及终端间负载确定电路，用于针对构成图像的每对所选择的像素列确定是否在分别对应于两个所选列的多个输出端之间建立短路 属于存储在第一和第二存储器电路中的两个所选列的四个像素中的至少三分之一的值。 如果端子间负载确定电路确定要建立短路，则在与像素的值相对应的电压被输出到两个输出之前，输出端对对开关电路在两个输出端之间临时建立短路 终端。

公开(公告)号：US20090289933A1

公开(公告)日：2009-11-26

申请号：US12428742

申请日：2009-04-23

Applicant: Seiichi Moriyama ,  Jyunichi Suenaga ,  Kenji Yamashita

Inventor： Seiichi Moriyama ,  Jyunichi Suenaga ,  Kenji Yamashita

IPC: G06F3/038

CPC classification number: G09G3/2096 ,  G09G3/288 ,  G09G2310/0221 ,  G09G2310/0286 ,  G09G2330/021 ,  G09G2330/06 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A display driving apparatus includes: n level shift units shifting a voltage level of n pixel data; a step potential providing unit providing a step potential; a change judgment unit judging whether or not each of the n pixel data has changed from pixel data of an immediately previous cycle; a delay unit generating n timing signals changing with different timings; and a control unit performing control such that the display output terminal corresponding to the pixel data judged to have changed by the change judgment unit is provided with: the step potential provided by the step potential providing unit during a first time period included in each of the cycle; and a potential shifted by the corresponding level shift unit during a second time period that is different from each other and is based on a timing of change of the corresponding timing signal.

Abstract translation: 显示驱动装置包括：n个电平移位单元，使n个像素数据的电压电平移位; 提供阶跃电位的阶梯电位提供单元; 改变判断单元，判断所述n个像素数据中的每一个是否从紧接在前的周期的像素数据变化; 延迟单元，产生以不同定时改变的n个定时信号; 以及控制单元，执行控制，使得与由变化判断单元判断为已经改变的像素数据相对应的显示输出端子被提供有：由第一时间段中的阶跃电位提供单元提供的阶跃电位包括在每个 周期; 以及在彼此不同的第二时间段期间被相应电平移位单元移位的电位，并且基于对应的定时信号的改变的定时。

公开(公告)号：US20070222710A1

公开(公告)日：2007-09-27

申请号：US11727469

申请日：2007-03-27

Applicant: Seiichi Moriyama ,  Hiroyuki Kageyama ,  Mamoru Seike ,  Jyunichi Suenaga

Inventor： Seiichi Moriyama ,  Hiroyuki Kageyama ,  Mamoru Seike ,  Jyunichi Suenaga

IPC: G09G3/28

CPC classification number: G09G3/2092 ,  G09G3/296 ,  G09G2330/021 ,  G09G2330/06

Abstract: A first latch circuit temporarily memorizes a display pixel data by one line. A second latch circuit temporarily memorizes the display pixel data as a preceding display pixel data that precedes the display pixel data by one line. The load judging circuit judges a transition state of the display pixel data based on the display pixel data and the preceding display pixel data and predicts a drive load capacity CL based on a result of the judgment. A drivability adjusting circuit adjusts a signal level of the display pixel data based on a result of the prediction of the drive load capacity CL and adjusts drivability of an output.

Abstract translation: 第一锁存电路将显示像素数据临时存储一行。 第二锁存电路将显示像素数据临时存储为显示像素数据之前的一行的前一显示像素数据。 负载判断电路基于显示像素数据和前一显示像素数据判断显示像素数据的转变状态，并根据判断结果预测驱动负载能力CL。 驱动能力调整电路根据驱动负载能力CL的预测结果来调整显示像素数据的信号电平，调整输出的驱动能力。

公开(公告)号：US07940231B2

公开(公告)日：2011-05-10

申请号：US11727469

申请日：2007-03-27

Applicant: Seiichi Moriyama ,  Hiroyuki Kageyama ,  Mamoru Seike ,  Jyunichi Suenaga

Inventor： Seiichi Moriyama ,  Hiroyuki Kageyama ,  Mamoru Seike ,  Jyunichi Suenaga

IPC: G09G3/28 ,  G09G3/36

CPC classification number: G09G3/2092 ,  G09G3/296 ,  G09G2330/021 ,  G09G2330/06

Abstract: A first latch circuit temporarily memorizes a display pixel data by one line. A second latch circuit temporarily memorizes the display pixel data as a preceding display pixel data that precedes the display pixel data by one line. The load judging circuit judges a transition state of the display pixel data based on the display pixel data and the preceding display pixel data and predicts a drive load capacity CL based on a result of the judgment. A drivability adjusting circuit adjusts a signal level of the display pixel data based on a result of the prediction of the drive load capacity CL and adjusts drivability of an output.

Abstract translation: 第一锁存电路将显示像素数据临时存储一行。 第二锁存电路将显示像素数据临时存储为显示像素数据之前的一行的前一显示像素数据。 负载判断电路基于显示像素数据和前一显示像素数据判断显示像素数据的转变状态，并根据判断结果预测驱动负载能力CL。 驱动能力调整电路根据驱动负载能力CL的预测结果来调整显示像素数据的信号电平，调整输出的驱动能力。

公开(公告)号：US07839397B2

公开(公告)日：2010-11-23

申请号：US11819582

申请日：2007-06-28

Applicant: Seiichi Moriyama ,  Mamoru Seike ,  Jyunichi Suenaga

Inventor： Seiichi Moriyama ,  Mamoru Seike ,  Jyunichi Suenaga

IPC: G09G5/00

CPC classification number: G09G3/288 ,  G06F3/0412 ,  G06F3/044 ,  G09G3/2092 ,  G09G3/2096 ,  G09G3/3688 ,  G09G2310/0221 ,  G09G2310/0248 ,  G09G2310/0251 ,  G09G2310/0275 ,  G09G2330/02

Abstract: A display driver includes: a first memory circuit for storing a line of pixels constituting an image; a second memory circuit for storing pixels of the immediately previous line; an output terminal pair switch circuit which outputs voltages each corresponding to a value of a pixel stored in the first memory circuit to a plurality of output terminals respectively corresponding to the pixels; and an inter-terminal load determination circuit for determining, for every pair of selected columns of pixels constituting the image, whether or not a short circuit is to be established between two of the plurality of output terminals which respectively correspond to the two selected columns based on values of at least three out of four pixels belonging to the two selected columns which are stored in the first and second memory circuits. If the inter-terminal load determination circuit determines that a short circuit is to be established, the output terminal pair switch circuit temporarily establishes a short circuit between the two output terminals before the voltages corresponding to the values of the pixels are output to the two output terminals.

Abstract translation: 显示驱动器包括：第一存储器电路，用于存储构成图像的一行像素; 第二存储器电路，用于存储紧接在前一行的像素; 输出端子对开关电路，其将分别对应于存储在第一存储器电路中的像素的电压的电压分别输出到分别对应于像素的多个输出端子; 以及终端间负载确定电路，用于针对构成图像的每对所选择的像素列确定是否在分别对应于两个所选列的多个输出端之间建立短路 属于存储在第一和第二存储器电路中的两个所选列的四个像素中的至少三分之一的值。 如果端子间负载确定电路确定要建立短路，则在与像素的值相对应的电压被输出到两个输出之前，输出端对对开关电路在两个输出端之间临时建立短路 终端。

公开(公告)号：US08049746B2

公开(公告)日：2011-11-01

申请号：US12428742

申请日：2009-04-23

Applicant: Seiichi Moriyama ,  Jyunichi Suenaga ,  Kenji Yamashita

Inventor： Seiichi Moriyama ,  Jyunichi Suenaga ,  Kenji Yamashita

IPC: G06F3/038

CPC classification number: G09G3/2096 ,  G09G3/288 ,  G09G2310/0221 ,  G09G2310/0286 ,  G09G2330/021 ,  G09G2330/06 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A display driving apparatus includes: n level shift units shifting a voltage level of n pixel data; a step potential providing unit providing a step potential; a change judgment unit judging whether or not each of the n pixel data has changed from pixel data of an immediately previous cycle; a delay unit generating n timing signals changing with different timings; and a control unit performing control such that the display output terminal corresponding to the pixel data judged to have changed by the change judgment unit is provided with: the step potential provided by the step potential providing unit during a first time period included in each of the cycle; and a potential shifted by the corresponding level shift unit during a second time period that is different from each other and is based on a timing of change of the corresponding timing signal.

Abstract translation: 显示驱动装置包括：n个电平移位单元，使n个像素数据的电压电平移位; 提供阶跃电位的阶梯电位提供单元; 改变判断单元，判断所述n个像素数据中的每一个是否从紧接在前的周期的像素数据变化; 延迟单元，产生以不同定时改变的n个定时信号; 以及控制单元，执行控制，使得与由变化判断单元判断为已经改变的像素数据相对应的显示输出端子被提供有：由第一时间段中的阶跃电位提供单元提供的阶跃电位包括在每个 周期; 以及在彼此不同的第二时间段期间被相应电平移位单元移位的电位，并且基于对应的定时信号的改变的定时。