公开(公告)号：US20140062083A1

公开(公告)日：2014-03-06

申请号：US14114593

申请日：2011-05-23

申请人： Jin-Uk Shin

发明人： Jin-Uk Shin

IPC分类号： F16L13/14 ,  B29D23/00

CPC分类号： F16L13/14 ,  B29C57/02 ,  B29D23/003 ,  B29K2027/06 ,  F16L43/008 ,  F16L47/06 ,  F16L47/32

摘要： The present invention relates to a method for reinforcing a connection tube having an expansion part, and to a connection tube having an expansion part reinforced by said method, characterized in that, in the method, a reinforcing tube manufactured using a homogeneous or heterogeneous synthetic resin, which is mounted on the outer surface of one end of a tube body formed by extruding a synthetic resin, and said tube body, in which the expansion part is to be formed, are heated to the glass transition temperature thereof. Then, the end of the tube body is fitted and fixed into an external former mold for expansion within a range in which said reinforcing tube is mounted, and an expansion member is inserted into the tube body so as to expand and form the end of the tube body on which the reinforcing tube is mounted. The connection tube reinforced as described above is expanded while the reinforcing tube made of the resin material is mounted on the end of the tube body in which the expansion part is to be formed. Thus, the reinforcing tube supplements the expansion part, which is relatively thin, due to the extension thereof, so as to prevent the expansion part from being damaged by external impacts and to prevent a bent portion of the expansion part from being broken by internal or external pressure, such as soil pressure or water pressure.

摘要翻译： 本发明涉及一种用于加强具有膨胀部分的连接管的方法，以及一种具有通过所述方法增强的膨胀部分的连接管，其特征在于，在该方法中，使用均质或非均匀的合成树脂 ，其安装在通过挤出合成树脂形成的管体的一端的外表面上，并且将其中将形成膨胀部分的所述管体加热至其玻璃化转变温度。 然后，在安装有加强管的范围内，将管体的端部嵌合并固定在外部成型模具中，将膨胀部件插入到管体内，使其膨胀并形成 管体，其上安装有加强管。 如上所述加强的连接管被扩张，而由树脂材料制成的加强管安装在要形成膨胀部分的管体的端部上。 因此，加强管由于其延伸而补充相对薄的膨胀部，以防止膨胀部被外部冲击损坏，并且防止膨胀部的弯曲部被内部或内部 外部压力，如土壤压力或水压。

公开(公告)号：US07084671B1

公开(公告)日：2006-08-01

申请号：US10765311

申请日：2004-01-26

申请人： Dennis Wendell ,  Howard L. Levy ,  Jin-Uk Shin

发明人： Dennis Wendell ,  Howard L. Levy ,  Jin-Uk Shin

IPC分类号： H03F3/45

CPC分类号： G11C7/065

摘要： A Negative Bias Temperature Instability (NBTI) tolerant sense amplifier is provided. The sense amplifier includes an input stage having a pair of balanced isolation devices. Each of the balanced isolation devices has an input connected to receive a separate one of a pair of differential input signals. Each of the balanced isolation devices also has a gate that is connected to receive a common bias voltage. The sense amplifier further includes a sense stage connected to the input stage. The sense stage is configured to receive and amplify a higher signal to be provided by the pair of balanced isolation devices. The sense amplifier is also equipped to operate a low voltage levels.

摘要翻译： 提供负偏压温度不稳定（NBTI）容差读出放大器。 读出放大器包括具有一对平衡隔离装置的输入级。 每个平衡隔离装置具有连接的输入端以接收一对差分输入信号中的单独的一个。 每个平衡隔离器件还具有连接以接收公共偏置电压的栅极。 读出放大器还包括连接到输入级的检测级。 感测级被配置为接收和放大由一对平衡隔离装置提供的较高信号。 读出放大器也配备了低电压工作电压。

公开(公告)号：US08324932B2

公开(公告)日：2012-12-04

申请号：US12953010

申请日：2010-11-23

申请人： Jin-Uk Shin ,  Lancelot Y. Kwong ,  Gaurav Shrivastav

发明人： Jin-Uk Shin ,  Lancelot Y. Kwong ,  Gaurav Shrivastav

IPC分类号： G06F7/60

CPC分类号： H03K19/215

摘要： A static complementary transistor type logic gate circuit includes a plurality of input terminals for receiving a corresponding plurality of input signals, and an output terminal. The logic gate circuit further includes a first plurality of transistors of one conductivity type, arranged to form a plurality of pullup paths for selectively connecting the output terminal, through one or more intermediate nodes, to a positive supply voltage based on the plurality of input signals; and a second plurality of transistors of the complementary conductivity type, arranged to form a plurality of pulldown paths for selectively connecting the output terminal, through one or more intermediate nodes, to a negative supply voltage based on the plurality of input signals. A precharge device is configured to selectively charge an intermediate node to the far-side supply voltage when the intermediate node is disconnected from the near-side supply voltage and disconnected from the output terminal.

摘要翻译： 静态互补晶体管型逻辑门电路包括用于接收对应的多个输入信号的多个输入端子和输出端子。 逻辑门电路还包括一个导电类型的第一多个晶体管，被布置成形成多个上拉路径，用于通过一个或多个中间节点有选择地将输出端子连接到基于多个输入信号的正电源电压 ; 以及互补导电类型的第二多个晶体管，布置成形成多个下拉路径，用于通过一个或多个中间节点选择性地将输出端子连接到基于多个输入信号的负电源电压。 预充电装置被配置为当中间节点与近侧电源电压断开并且与输出端子断开时，有选择地将中间节点充电到远侧电源电压。

公开(公告)号：US07752410B1

公开(公告)日：2010-07-06

申请号：US11035594

申请日：2005-01-14

申请人： Jin-Uk Shin ,  Effendy Kumala

发明人： Jin-Uk Shin ,  Effendy Kumala

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC分类号： G06F12/0844 ,  Y02D10/13

摘要： A hardware implemented method for accessing data in a multicycle operations cache is provided. In this hardware implemented method, a request to access the data in a sub-bank of the multicycle operations cache is received. If the sub-bank is accessed in a previous, consecutive clock cycle, then the request to access the data in the sub-bank is ignored. Else, if the sub-bank is not accessed in the previous, consecutive clock cycle, then the data is allowed to be accessed in the sub-bank. A memory chip and a system for accessing data in the multicycle operations cache also are described.

摘要翻译： 提供了一种用于访问多周期操作高速缓存中的数据的硬件实现方法。 在该硬件实现方法中，接收到访问多周期操作高速缓存的子组中的数据的请求。 如果在先前的连续时钟周期中访问子行，则忽略访问子行中的数据的请求。 否则，如果在前一个连续时钟周期中没有访问子行，则允许在子行中访问数据。 还描述了存储芯片和用于访问多周期操作高速缓存中的数据的系统。

公开(公告)号：US08446791B2

公开(公告)日：2013-05-21

申请号：US12960047

申请日：2010-12-03

申请人： Ha M. Pham ,  Jin-Uk Shin ,  Vaibhav Gupta

发明人： Ha M. Pham ,  Jin-Uk Shin ,  Vaibhav Gupta

IPC分类号： G11C7/06 ,  G11C7/08 ,  G11C7/12 ,  G11C7/22 ,  G11C8/12

CPC分类号： G11C7/04 ,  G11C7/065 ,  G11C7/12

摘要： A process-tolerant large-swing sense amplifier with latching capability includes top-array and bottom-array access. The sense amplifier provides improved tolerance to process variation, reduces design complexity, reduces power consumption, and reduces the physical footprint of the circuit. In addition, the sense amplifier provides write-through functionality through the read data bus.

摘要翻译： 具有锁存能力的过程容忍大摆幅读出放大器包括顶部阵列和底部阵列访问。 读出放大器提供改进的工艺变化公差，降低设计复杂性，降低功耗，并减少电路的物理占位面积。 此外，读出放大器通过读取数据总线提供直写功能。

公开(公告)号：US20120140575A1

公开(公告)日：2012-06-07

申请号：US12960047

申请日：2010-12-03

申请人： Ha M. Pham ,  Jin-Uk Shin ,  Vaibhav Gupta

发明人： Ha M. Pham ,  Jin-Uk Shin ,  Vaibhav Gupta

IPC分类号： G11C7/06 ,  H03F3/16

CPC分类号： G11C7/04 ,  G11C7/065 ,  G11C7/12

摘要： A process-tolerant large-swing sense amplifier with latching capability includes top-array and bottom-array access. The sense amplifier provides improved tolerance to process variation, reduces design complexity, reduces power consumption, and reduces the physical footprint of the circuit. In addition, the sense amplifier provides write-through functionality through the read data bus.

摘要翻译： 具有锁存能力的过程容忍大摆幅读出放大器包括顶部阵列和底部阵列访问。 读出放大器提供改进的工艺变化公差，降低设计复杂性，降低功耗，并减少电路的物理占位面积。 此外，读出放大器通过读取数据总线提供直写功能。

公开(公告)号：US20120126852A1

公开(公告)日：2012-05-24

申请号：US12953010

申请日：2010-11-23

申请人： Jin-Uk Shin ,  Lancelot Y. Kwong ,  Gaurav Shrivastav

发明人： Jin-Uk Shin ,  Lancelot Y. Kwong ,  Gaurav Shrivastav

IPC分类号： H03K19/21 ,  H03K19/0175

CPC分类号： H03K19/215

摘要： A static complementary transistor type logic gate circuit includes a plurality of input terminals for receiving a corresponding plurality of input signals, and an output terminal. The logic gate circuit further includes a first plurality of transistors of one conductivity type, arranged to form a plurality of pullup paths for selectively connecting the output terminal, through one or more intermediate nodes, to a positive supply voltage based on the plurality of input signals; and a second plurality of transistors of the complementary conductivity type, arranged to form a plurality of pulldown paths for selectively connecting the output terminal, through one or more intermediate nodes, to a negative supply voltage based on the plurality of input signals. A precharge device is configured to selectively charge an intermediate node to the far-side supply voltage when the intermediate node is disconnected from the near-side supply voltage and disconnected from the output terminal.

摘要翻译： 静态互补晶体管型逻辑门电路包括用于接收对应的多个输入信号的多个输入端子和输出端子。 逻辑门电路还包括一个导电类型的第一多个晶体管，被布置成形成多个上拉路径，用于通过一个或多个中间节点有选择地将输出端子连接到基于多个输入信号的正电源电压 ; 以及互补导电类型的第二多个晶体管，布置成形成多个下拉路径，用于通过一个或多个中间节点选择性地将输出端子连接到基于多个输入信号的负电源电压。 预充电装置被配置为当中间节点与近侧电源电压断开并且与输出端子断开时，有选择地将中间节点充电到远侧电源电压。