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公开(公告)号：US20100299468A1
公开(公告)日：2010-11-25
申请号：US12469694
申请日：2009-05-21
IPC分类号： G06F13/00
CPC分类号： G06F13/4086 , Y02D10/14 , Y02D10/151
摘要： A memory device is coupled to a subset of lines of a data input/output (I/O) bus. The memory device includes an on-die active termination circuit for terminating the subset of lines of the data I/O bus with a selected impedance being one of a plurality of selectable impedances; a termination value register being coupled to the on-die active termination circuit for storing a value representing the selected impedance; and a termination value setting circuit being coupled to the termination value register, for setting the value representing the selected impedance in the termination value register.
摘要翻译： 存储器件耦合到数据输入/输出（I / O）总线的一行子集。 存储器件包括一个片上有源终端电路，用于以选择的阻抗为多个可选阻抗之一来终止数据I / O总线的线路子集; 终端值寄存器耦合到片上有源终端电路，用于存储表示所选阻抗的值; 以及终端值设置电路，其耦合到终止值寄存器，用于将表示所选阻抗的值设置在终止值寄存器中。
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公开(公告)号：US07843213B1
公开(公告)日：2010-11-30
申请号：US12469694
申请日：2009-05-21
IPC分类号： H03K17/16 , H03K19/003
CPC分类号： G06F13/4086 , Y02D10/14 , Y02D10/151
摘要： A memory device is coupled to a subset of lines of a data input/output (I/O) bus. The memory device includes an on-die active termination circuit for terminating the subset of lines of the data I/O bus with a selected impedance being one of a plurality of selectable impedances; a termination value register being coupled to the on-die active termination circuit for storing a value representing the selected impedance; and a termination value setting circuit being coupled to the termination value register, for setting the value representing the selected impedance in the termination value register.
摘要翻译： 存储器件耦合到数据输入/输出（I / O）总线的一行子集。 存储器件包括一个片上有源终端电路，用于以选择的阻抗为多个可选阻抗之一来终止数据I / O总线的线路子集; 终端值寄存器耦合到片上有源终端电路，用于存储表示所选阻抗的值; 以及终端值设置电路，其耦合到终止值寄存器，用于将表示所选阻抗的值设置在终止值寄存器中。
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