Assembly and method for improved scanning electron microscope analysis of semiconductor devices
    1.
    发明授权
    Assembly and method for improved scanning electron microscope analysis of semiconductor devices 有权
    用于改进半导体器件扫描电子显微镜分析的装配和方法

    公开(公告)号:US06642518B1

    公开(公告)日:2003-11-04

    申请号:US10176873

    申请日:2002-06-21

    Abstract: An assembly and method for improved scanning electron microscope analysis of semiconductor devices include a structure including a first layer and a second layer, the second layer shrinking substantially when the structure is examined with a scanning electron microscope having a beam energy of at least 1.5 KeV, and at least part of the surface of the structure coated with a material composed of Iridium, wherein the coating is of sufficient thickness to reduce shrinkage of the second layer to approximately a predetermined amount when the structure is examined with a scanning electron microscope having a beam energy of at least 1.5 KeV.

    Abstract translation: 用于改进半导体器件的扫描电子显微镜分析的组件和方法包括包括第一层和第二层的结构,当使用具有至少1.5KeV的束能的扫描电子显微镜检查结构时,第二层基本上收缩, 并且涂覆有由铱构成的材料的结构的表面的至少一部分,其中当使用具有光束的扫描电子显微镜检查结构时,涂层具有足够的厚度以减小第二层的收缩至约预定量 至少1.5 KeV的能量。

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