公开(公告)号：US20170047264A1

公开(公告)日：2017-02-16

申请号：US15235958

申请日：2016-08-12

Applicant: YUNHYEOK IM ,  OLEG FEYGENSON ,  SANG IL KIM ,  YOUNGBAE KIM ,  JICHUL KIM ,  SEUNGKON MOK ,  JUNGSU HA

Inventor： YUNHYEOK IM ,  OLEG FEYGENSON ,  SANG IL KIM ,  YOUNGBAE KIM ,  JICHUL KIM ,  SEUNGKON MOK ,  JUNGSU HA

IPC: H01L23/367 ,  H01L23/373 ,  H01L21/56 ,  H01L23/31 ,  H01L23/29

CPC classification number: H01L23/367 ,  H01L21/4871 ,  H01L21/563 ,  H01L23/36 ,  H01L23/3736 ,  H01L23/49816 ,  H01L23/552 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L25/105 ,  H01L25/50 ,  H01L29/0657 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

Abstract: Semiconductor packages and methods of fabricating the same are disclosed. The semiconductor package may include a package substrate, a semiconductor chip, which is mounted on the package substrate to have a bottom surface facing the package substrate and a top surface opposite to the bottom surface, a mold layer provided on the package substrate to encapsulate the semiconductor chip, and a heat dissipation layer provided on the top surface of the semiconductor chip. The mold layer may have a top surface substantially coplanar with the top surface of the semiconductor chip, and the top surfaces of the semiconductor chip and the mold layer may have a difference in surface roughness from each other.

Abstract translation: 公开了半导体封装及其制造方法。 半导体封装可以包括封装衬底，半导体芯片，其安装在封装衬底上以具有面向封装衬底的底表面和与底表面相对的顶表面;模具层，设置在封装衬底上以封装 半导体芯片和设置在半导体芯片的顶表面上的散热层。 模具层可以具有与半导体芯片的顶表面基本上共面的顶表面，并且半导体芯片和模具层的顶表面可以具有彼此不同的表面粗糙度。

公开(公告)号：US09978661B2

公开(公告)日：2018-05-22

申请号：US15235958

申请日：2016-08-12

Applicant: Yunhyeok Im ,  Oleg Feygenson ,  Sang Il Kim ,  Youngbae Kim ,  Jichul Kim ,  Seungkon Mok ,  Jungsu Ha

Inventor： Yunhyeok Im ,  Oleg Feygenson ,  Sang Il Kim ,  Youngbae Kim ,  Jichul Kim ,  Seungkon Mok ,  Jungsu Ha

IPC: H01L23/367 ,  H01L23/373 ,  H01L21/56 ,  H01L23/552 ,  H01L23/00 ,  H01L25/10 ,  H01L25/00 ,  H01L29/06

CPC classification number: H01L23/367 ,  H01L21/4871 ,  H01L21/563 ,  H01L23/36 ,  H01L23/3736 ,  H01L23/49816 ,  H01L23/552 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L25/105 ,  H01L25/50 ,  H01L29/0657 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

Abstract: Semiconductor packages and methods of fabricating the same are disclosed. The semiconductor package may include a package substrate, a semiconductor chip, which is mounted on the package substrate to have a bottom surface facing the package substrate and a top surface opposite to the bottom surface, a mold layer provided on the package substrate to encapsulate the semiconductor chip, and a heat dissipation layer provided on the top surface of the semiconductor chip. The mold layer may have a top surface substantially coplanar with the top surface of the semiconductor chip, and the top surfaces of the semiconductor chip and the mold layer may have a difference in surface roughness from each other.