摘要:
A superconductive electrical device is operable simultaneously at relatively higher temperatures, i.e., 60-90K, and at relatively lower temperatures, i.e., less than 12K. The device comprises a non-superconductive substrate with two regions, a first relatively high temperature region and a second relatively low temperature region. A high temperature superconductor is on the first region and a portion of the second region. A dielectric layer is on the high temperature superconductor. A low temperature superconductor is on the second region of the substrate and on a portion of the dielectric layer. Integrated circuit chips can be secured to both superconductors, thereby yielding a superconductive multi-chip module operable at two different temperatures, such as in a cryo-cooler with two temperature stages.
摘要:
A superconductive electrical device is operable simultaneously at relatively higher temperatures, i.e., 60-90K, and at relatively lower temperatures, i.e., less than 12K. The device comprises a non-superconductive substrate with two regions, a first relatively high temperature region and a second relatively low temperature region. A high temperature superconductor is on the first region and a portion of the second region. A dielectric layer is on the high temperature superconductor. A low temperature superconductor is on the second region of the substrate and on a portion of the dielectric layer. Integrated circuit chips can be secured to both superconductors, thereby yielding a superconductive multi-chip module operable at two different temperatures, such as in a cryo-cooler with two temperature stages.
摘要:
A SQUID 10 was multiple junctions, each junction allowing a critical current to flow therethrough. The SQUID 10 comprises a laminar structure including: (a) a substantially planar substrate 12; (b) a first high temperature superconductive layer 14 of substantially uniform thickness deposited on the substrates; (c) a dielectric layer 16 deposited on the first superconductive layer 14, the dielectric layer 16 comprising a planar level segment 18 having two ramp segments defining SQUID junctions at opposing ends 20 and defining SQUID hole; and (d) a second high temperature superconductive layer 24 of substantially uniform thickness deposited on the dielectric layer 16, the second high temperature superconductive layer 24 covering all three segments of the dielectric layer 16. A magnetic field substantially parallel to the substrate applied to the SQUID hole modulates a critical current flowing through the junctions while minimizing magnetic field penetration into the junctions and minimizing SQUID loop inductance.