Semiconductor memory device having driver for compensating for parasitic resistance of data input-output pads
    4.
    发明授权
    Semiconductor memory device having driver for compensating for parasitic resistance of data input-output pads 有权
    半导体存储器件具有用于补偿数据输入 - 输出焊盘的寄生电阻的驱动器

    公开(公告)号:US08203860B2

    公开(公告)日:2012-06-19

    申请号:US12461141

    申请日:2009-08-03

    IPC分类号: G11C5/06 H01S4/00 G11C8/08

    摘要: A semiconductor memory device that includes a supply voltage pad, a ground voltage pad, and at least two data input/output pads arranged between the supply voltage pad and the ground voltage pad. The semiconductor memory device has a first pull-up driver that is connected to the second data input/output pad located at a first distance from the supply voltage pad, and a first pull-down driver that is connected to the first data input/output pad located at a second distance from the ground voltage pad.

    摘要翻译: 一种半导体存储器件,包括电源电压焊盘,接地电压焊盘以及布置在电源电压焊盘和接地电压焊盘之间的至少两个数据输入/输出焊盘。 半导体存储器件具有第一上拉驱动器,其连接到位于与电源电压焊盘相距第一距离处的第二数据输入/输出焊盘,以及第一下拉驱动器,其连接到第一数据输入/输出 焊盘位于离地电压焊盘的第二距离处。

    Semiconductor memory device having driver for compensating for parasitic resistance of data input-output pads
    6.
    发明申请
    Semiconductor memory device having driver for compensating for parasitic resistance of data input-output pads 有权
    半导体存储器件具有用于补偿数据输入 - 输出焊盘的寄生电阻的驱动器

    公开(公告)号:US20100110749A1

    公开(公告)日:2010-05-06

    申请号:US12461141

    申请日:2009-08-03

    IPC分类号: G11C5/06 H01S4/00 G11C8/08

    摘要: A semiconductor memory device that includes a supply voltage pad, a ground voltage pad, and at least two data input/output pads arranged between the supply voltage pad and the ground voltage pad. The semiconductor memory device has a first pull-up driver that is connected to the second data input/output pad located at a first distance from the supply voltage pad, and a first pull-down driver that is connected to the first data input/output pad located at a second distance from the ground voltage pad.

    摘要翻译: 一种半导体存储器件,包括电源电压焊盘,接地电压焊盘以及布置在电源电压焊盘和接地电压焊盘之间的至少两个数据输入/输出焊盘。 半导体存储器件具有第一上拉驱动器,其连接到位于与电源电压焊盘相距第一距离处的第二数据输入/输出焊盘,以及第一下拉驱动器,其连接到第一数据输入/输出 焊盘位于离地电压焊盘的第二距离处。